^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Minimalist driver for a generic PCI-to-EISA bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/eisa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* There is only *one* pci_eisa device per machine, right ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static struct eisa_root_device pci_eisa_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static int __init pci_eisa_init(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct resource *res, *bus_res = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) if ((rc = pci_enable_device (pdev))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) dev_err(&pdev->dev, "Could not enable device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * device, so the resources available on EISA are the same as those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * available on the 82375 bus. This works the same as a PCI-PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * We assume other PCI-EISA bridges are similar.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * eisa_root_register() can only deal with a single io port resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * so we use the first valid io port resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) pci_bus_for_each_resource(pdev->bus, res, i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (res && (res->flags & IORESOURCE_IO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) bus_res = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (!bus_res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) dev_err(&pdev->dev, "No resources available\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) pci_eisa_root.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) pci_eisa_root.res = bus_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) pci_eisa_root.bus_base_addr = bus_res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) pci_eisa_root.slots = EISA_MAX_SLOTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) pci_eisa_root.dma_mask = pdev->dma_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (eisa_root_register (&pci_eisa_root)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dev_err(&pdev->dev, "Could not register EISA root\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Otherwise pnp resource will get enabled early and could prevent eisa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * to be initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * Also need to make sure pci_eisa_init_early() is called after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * x86/pci_subsys_init().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * So need to use subsys_initcall_sync with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int __init pci_eisa_init_early(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct pci_dev *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) for_each_pci_dev(dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ret = pci_eisa_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) subsys_initcall_sync(pci_eisa_init_early);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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