^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2011-2012 Calxeda, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/edac.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "edac_module.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define SR_CLR_SB_ECC_INTR 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SR_CLR_DB_ECC_INTR 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct hb_l2_drvdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int sb_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) int db_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct edac_device_ctl_info *dci = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct hb_l2_drvdata *drvdata = dci->pvt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) if (irq == drvdata->sb_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) edac_device_handle_ce(dci, 0, 0, dci->ctl_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (irq == drvdata->db_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) edac_device_handle_ue(dci, 0, 0, dci->ctl_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static const struct of_device_id hb_l2_err_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { .compatible = "calxeda,hb-sregs-l2-ecc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MODULE_DEVICE_TABLE(of, hb_l2_err_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int highbank_l2_err_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) const struct of_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct edac_device_ctl_info *dci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct hb_l2_drvdata *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 1, "L", 1, 2, NULL, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!dci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) drvdata = dci->pvt_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) dci->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) platform_set_drvdata(pdev, dci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (!r) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dev_err(&pdev->dev, "Unable to get mem resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) res = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (!devm_request_mem_region(&pdev->dev, r->start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) resource_size(r), dev_name(&pdev->dev))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) dev_err(&pdev->dev, "Error while requesting mem region\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) res = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!drvdata->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dev_err(&pdev->dev, "Unable to map regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) res = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) id = of_match_device(hb_l2_err_of_match, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) dci->mod_name = pdev->dev.driver->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dci->ctl_name = id ? id->compatible : "unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dci->dev_name = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (edac_device_add_device(dci))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) drvdata->db_irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) res = devm_request_irq(&pdev->dev, drvdata->db_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) highbank_l2_err_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 0, dev_name(&pdev->dev), dci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (res < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) drvdata->sb_irq = platform_get_irq(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) res = devm_request_irq(&pdev->dev, drvdata->sb_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) highbank_l2_err_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 0, dev_name(&pdev->dev), dci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (res < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) devres_close_group(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) edac_device_del_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) devres_release_group(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) edac_device_free_ctl_info(dci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int highbank_l2_err_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct edac_device_ctl_info *dci = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) edac_device_del_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) edac_device_free_ctl_info(dci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static struct platform_driver highbank_l2_edac_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .probe = highbank_l2_err_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .remove = highbank_l2_err_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .name = "hb_l2_edac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .of_match_table = hb_l2_err_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) module_platform_driver(highbank_l2_edac_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MODULE_AUTHOR("Calxeda, Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags