^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * (C) 2005, 2006 Linux Networx (http://lnxi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * This file may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Written Doug Thompson <norsk5@xmission.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/edac.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "edac_pci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "edac_module.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define EDAC_PCI_SYMLINK "device"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* data variables exported via sysfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static int check_pci_errors; /* default NO check PCI parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static int edac_pci_panic_on_pe; /* default NO panic on PCI Parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int edac_pci_log_pe = 1; /* log PCI parity errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int edac_pci_log_npe = 1; /* log PCI non-parity error errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static int edac_pci_poll_msec = 1000; /* one second workq period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static atomic_t pci_parity_count = ATOMIC_INIT(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static atomic_t pci_nonparity_count = ATOMIC_INIT(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static struct kobject *edac_pci_top_main_kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static atomic_t edac_pci_sysfs_refcount = ATOMIC_INIT(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* getter functions for the data variables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int edac_pci_get_check_errors(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return check_pci_errors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int edac_pci_get_log_pe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return edac_pci_log_pe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int edac_pci_get_log_npe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return edac_pci_log_npe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int edac_pci_get_panic_on_pe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return edac_pci_panic_on_pe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int edac_pci_get_poll_msec(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return edac_pci_poll_msec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /**************************** EDAC PCI sysfs instance *******************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static ssize_t instance_pe_count_show(struct edac_pci_ctl_info *pci, char *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return sprintf(data, "%u\n", atomic_read(&pci->counters.pe_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static ssize_t instance_npe_count_show(struct edac_pci_ctl_info *pci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) char *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return sprintf(data, "%u\n", atomic_read(&pci->counters.npe_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define to_instance(k) container_of(k, struct edac_pci_ctl_info, kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define to_instance_attr(a) container_of(a, struct instance_attribute, attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* DEVICE instance kobject release() function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static void edac_pci_instance_release(struct kobject *kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct edac_pci_ctl_info *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) edac_dbg(0, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Form pointer to containing struct, the pci control struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pci = to_instance(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* decrement reference count on top main kobj */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) kobject_put(edac_pci_top_main_kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) kfree(pci); /* Free the control struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* instance specific attribute structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct instance_attribute {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct attribute attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ssize_t(*show) (struct edac_pci_ctl_info *, char *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ssize_t(*store) (struct edac_pci_ctl_info *, const char *, size_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Function to 'show' fields from the edac_pci 'instance' structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static ssize_t edac_pci_instance_show(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct attribute *attr, char *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct edac_pci_ctl_info *pci = to_instance(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct instance_attribute *instance_attr = to_instance_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (instance_attr->show)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return instance_attr->show(pci, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* Function to 'store' fields into the edac_pci 'instance' structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static ssize_t edac_pci_instance_store(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) const char *buffer, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct edac_pci_ctl_info *pci = to_instance(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct instance_attribute *instance_attr = to_instance_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (instance_attr->store)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return instance_attr->store(pci, buffer, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* fs_ops table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const struct sysfs_ops pci_instance_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .show = edac_pci_instance_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .store = edac_pci_instance_store
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define INSTANCE_ATTR(_name, _mode, _show, _store) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct instance_attribute attr_instance_##_name = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .attr = {.name = __stringify(_name), .mode = _mode }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .show = _show, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .store = _store, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) INSTANCE_ATTR(pe_count, S_IRUGO, instance_pe_count_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) INSTANCE_ATTR(npe_count, S_IRUGO, instance_npe_count_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* pci instance attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct instance_attribute *pci_instance_attr[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) &attr_instance_pe_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) &attr_instance_npe_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* the ktype for a pci instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static struct kobj_type ktype_pci_instance = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .release = edac_pci_instance_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .sysfs_ops = &pci_instance_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .default_attrs = (struct attribute **)pci_instance_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * edac_pci_create_instance_kobj
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * construct one EDAC PCI instance's kobject for use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int edac_pci_create_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct kobject *main_kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) edac_dbg(0, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* First bump the ref count on the top main kobj, which will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * track the number of PCI instances we have, and thus nest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * properly on keeping the module loaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) main_kobj = kobject_get(edac_pci_top_main_kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (!main_kobj) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) goto error_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* And now register this new kobject under the main kobj */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) err = kobject_init_and_add(&pci->kobj, &ktype_pci_instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) edac_pci_top_main_kobj, "pci%d", idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (err != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) edac_dbg(2, "failed to register instance pci%d\n", idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) kobject_put(edac_pci_top_main_kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) goto error_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) kobject_uevent(&pci->kobj, KOBJ_ADD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) edac_dbg(1, "Register instance 'pci%d' kobject\n", idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* Error unwind statck */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) error_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * edac_pci_unregister_sysfs_instance_kobj
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * unregister the kobj for the EDAC PCI instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void edac_pci_unregister_sysfs_instance_kobj(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct edac_pci_ctl_info *pci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) edac_dbg(0, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Unregister the instance kobject and allow its release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * function release the main reference count and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * kfree the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) kobject_put(&pci->kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /***************************** EDAC PCI sysfs root **********************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define to_edacpci(k) container_of(k, struct edac_pci_ctl_info, kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define to_edacpci_attr(a) container_of(a, struct edac_pci_attr, attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* simple show/store functions for attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static ssize_t edac_pci_int_show(void *ptr, char *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int *value = ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return sprintf(buffer, "%d\n", *value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) int *value = ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (isdigit(*buffer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) *value = simple_strtoul(buffer, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct edac_pci_dev_attribute {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct attribute attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) void *value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ssize_t(*show) (void *, char *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ssize_t(*store) (void *, const char *, size_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* Set of show/store abstract level functions for PCI Parity object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) char *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct edac_pci_dev_attribute *edac_pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) edac_pci_dev = (struct edac_pci_dev_attribute *)attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (edac_pci_dev->show)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return edac_pci_dev->show(edac_pci_dev->value, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static ssize_t edac_pci_dev_store(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct attribute *attr, const char *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct edac_pci_dev_attribute *edac_pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) edac_pci_dev = (struct edac_pci_dev_attribute *)attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (edac_pci_dev->store)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static const struct sysfs_ops edac_pci_sysfs_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .show = edac_pci_dev_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .store = edac_pci_dev_store
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .attr = {.name = __stringify(_name), .mode = _mode }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .value = &_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .show = _show, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .store = _store, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .attr = {.name = __stringify(_name), .mode = _mode }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .value = _data, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .show = _show, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .store = _store, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* PCI Parity control files */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) EDAC_PCI_ATTR(check_pci_errors, S_IRUGO | S_IWUSR, edac_pci_int_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) edac_pci_int_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) EDAC_PCI_ATTR(edac_pci_log_pe, S_IRUGO | S_IWUSR, edac_pci_int_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) edac_pci_int_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) EDAC_PCI_ATTR(edac_pci_log_npe, S_IRUGO | S_IWUSR, edac_pci_int_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) edac_pci_int_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) EDAC_PCI_ATTR(edac_pci_panic_on_pe, S_IRUGO | S_IWUSR, edac_pci_int_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) edac_pci_int_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) EDAC_PCI_ATTR(pci_nonparity_count, S_IRUGO, edac_pci_int_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Base Attributes of the memory ECC object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static struct edac_pci_dev_attribute *edac_pci_attr[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) &edac_pci_attr_check_pci_errors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) &edac_pci_attr_edac_pci_log_pe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) &edac_pci_attr_edac_pci_log_npe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) &edac_pci_attr_edac_pci_panic_on_pe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) &edac_pci_attr_pci_parity_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) &edac_pci_attr_pci_nonparity_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * edac_pci_release_main_kobj
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * This release function is called when the reference count to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * passed kobj goes to zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * This kobj is the 'main' kobject that EDAC PCI instances
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * link to, and thus provide for proper nesting counts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static void edac_pci_release_main_kobj(struct kobject *kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) edac_dbg(0, "here to module_put(THIS_MODULE)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) kfree(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* last reference to top EDAC PCI kobject has been removed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * NOW release our ref count on the core module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) module_put(THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* ktype struct for the EDAC PCI main kobj */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct kobj_type ktype_edac_pci_main_kobj = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .release = edac_pci_release_main_kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .sysfs_ops = &edac_pci_sysfs_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .default_attrs = (struct attribute **)edac_pci_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * edac_pci_main_kobj_setup: Setup the sysfs for EDAC PCI attributes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int edac_pci_main_kobj_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct bus_type *edac_subsys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) edac_dbg(0, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* check and count if we have already created the main kobject */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (atomic_inc_return(&edac_pci_sysfs_refcount) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* First time, so create the main kobject and its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * controls and attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) edac_subsys = edac_get_sysfs_subsys();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* Bump the reference count on this module to ensure the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * modules isn't unloaded until we deconstruct the top
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * level main kobj for EDAC PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (!try_module_get(THIS_MODULE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) edac_dbg(1, "try_module_get() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) goto decrement_count_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) edac_pci_top_main_kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (!edac_pci_top_main_kobj) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) edac_dbg(1, "Failed to allocate\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) goto kzalloc_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* Instanstiate the pci object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) err = kobject_init_and_add(edac_pci_top_main_kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) &ktype_edac_pci_main_kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) &edac_subsys->dev_root->kobj, "pci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) edac_dbg(1, "Failed to register '.../edac/pci'\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) goto kobject_init_and_add_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* At this point, to 'release' the top level kobject
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * for EDAC PCI, then edac_pci_main_kobj_teardown()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * must be used, for resources to be cleaned up properly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) kobject_uevent(edac_pci_top_main_kobj, KOBJ_ADD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) edac_dbg(1, "Registered '.../edac/pci' kobject\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) /* Error unwind statck */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) kobject_init_and_add_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) kobject_put(edac_pci_top_main_kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) kzalloc_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) module_put(THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) decrement_count_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* if are on this error exit, nothing to tear down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) atomic_dec(&edac_pci_sysfs_refcount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * edac_pci_main_kobj_teardown()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * if no longer linked (needed) remove the top level EDAC PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * kobject with its controls and attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static void edac_pci_main_kobj_teardown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) edac_dbg(0, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /* Decrement the count and only if no more controller instances
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * are connected perform the unregisteration of the top level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * main kobj
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) edac_dbg(0, "called kobject_put on main kobj\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) kobject_put(edac_pci_top_main_kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct kobject *edac_kobj = &pci->kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) edac_dbg(0, "idx=%d\n", pci->pci_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* create the top main EDAC PCI kobject, IF needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) err = edac_pci_main_kobj_setup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* Create this instance's kobject under the MAIN kobject */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) err = edac_pci_create_instance_kobj(pci, pci->pci_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) goto unregister_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) err = sysfs_create_link(edac_kobj, &pci->dev->kobj, EDAC_PCI_SYMLINK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) edac_dbg(0, "sysfs_create_link() returned err= %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) goto symlink_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* Error unwind stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) symlink_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) edac_pci_unregister_sysfs_instance_kobj(pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) unregister_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) edac_pci_main_kobj_teardown();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) edac_dbg(0, "index=%d\n", pci->pci_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /* Remove the symlink */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) sysfs_remove_link(&pci->kobj, EDAC_PCI_SYMLINK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* remove this PCI instance's sysfs entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) edac_pci_unregister_sysfs_instance_kobj(pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) /* Call the main unregister function, which will determine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * if this 'pci' is the last instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * If it is, the main kobject will be unregistered as a result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) edac_dbg(0, "calling edac_pci_main_kobj_teardown()\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) edac_pci_main_kobj_teardown();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /************************ PCI error handling *************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) int where;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) pci_read_config_word(dev, where, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /* If we get back 0xFFFF then we must suspect that the card has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * pulled but the Linux PCI layer has not yet finished cleaning up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * We don't want to report on such devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (status == 0xFFFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) u32 sanity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) pci_read_config_dword(dev, 0, &sanity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (sanity == 0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) PCI_STATUS_PARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /* reset only the bits we are interested in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) pci_write_config_word(dev, where, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* Clear any PCI parity errors logged by this device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static void edac_pci_dev_parity_clear(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) u8 header_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) get_pci_parity_status(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /* read the device TYPE, looking for bridges */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) get_pci_parity_status(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * PCI Parity polling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * Function to retrieve the current parity status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * and decode it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static void edac_pci_dev_parity_test(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) u8 header_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* stop any interrupts until we can acquire the status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /* read the STATUS register on this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) status = get_pci_parity_status(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* read the device TYPE, looking for bridges */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) edac_dbg(4, "PCI STATUS= 0x%04x %s\n", status, dev_name(&dev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* check the status reg for errors on boards NOT marked as broken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * if broken, we cannot trust any of the status bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (status && !dev->broken_parity_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) edac_printk(KERN_CRIT, EDAC_PCI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) "Signaled System Error on %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) atomic_inc(&pci_nonparity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (status & (PCI_STATUS_PARITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) edac_printk(KERN_CRIT, EDAC_PCI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) "Master Data Parity Error on %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) atomic_inc(&pci_parity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (status & (PCI_STATUS_DETECTED_PARITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) edac_printk(KERN_CRIT, EDAC_PCI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) "Detected Parity Error on %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) atomic_inc(&pci_parity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) edac_dbg(4, "PCI HEADER TYPE= 0x%02x %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) header_type, dev_name(&dev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* On bridges, need to examine secondary status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) status = get_pci_parity_status(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) edac_dbg(4, "PCI SEC_STATUS= 0x%04x %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) status, dev_name(&dev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) /* check the secondary status reg for errors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * on NOT broken boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (status && !dev->broken_parity_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) "Signaled System Error on %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) atomic_inc(&pci_nonparity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (status & (PCI_STATUS_PARITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) "Master Data Parity Error on "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) "%s\n", pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) atomic_inc(&pci_parity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (status & (PCI_STATUS_DETECTED_PARITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) "Detected Parity Error on %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) atomic_inc(&pci_parity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /* reduce some complexity in definition of the iterator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * pci_dev parity list iterator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * Scan the PCI device list looking for SERRORs, Master Parity ERRORS or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * Parity ERRORs on primary or secondary devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) struct pci_dev *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) for_each_pci_dev(dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) fn(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * edac_pci_do_parity_check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) * performs the actual PCI parity check operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) void edac_pci_do_parity_check(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) int before_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) edac_dbg(3, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* if policy has PCI check off, leave now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) if (!check_pci_errors)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) before_count = atomic_read(&pci_parity_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /* scan all PCI devices looking for a Parity Error on devices and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * bridges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * The iterator calls pci_get_device() which might sleep, thus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * we cannot disable interrupts in this scan.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* Only if operator has selected panic on PCI Error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (edac_pci_get_panic_on_pe()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /* If the count is different 'after' from 'before' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (before_count != atomic_read(&pci_parity_count))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) panic("EDAC: PCI Parity Error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) * edac_pci_clear_parity_errors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * function to perform an iteration over the PCI devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * and clearn their current status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) void edac_pci_clear_parity_errors(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) /* Clear any PCI bus parity errors that devices initially have logged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) * in their registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) * edac_pci_handle_pe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * Called to handle a PARITY ERROR event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) void edac_pci_handle_pe(struct edac_pci_ctl_info *pci, const char *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* global PE counter incremented by edac_pci_do_parity_check() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) atomic_inc(&pci->counters.pe_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (edac_pci_get_log_pe())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) edac_pci_printk(pci, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) "Parity Error ctl: %s %d: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) pci->ctl_name, pci->pci_idx, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) * poke all PCI devices and see which one is the troublemaker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * panic() is called if set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) edac_pci_do_parity_check();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) EXPORT_SYMBOL_GPL(edac_pci_handle_pe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) * edac_pci_handle_npe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) * Called to handle a NON-PARITY ERROR event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) void edac_pci_handle_npe(struct edac_pci_ctl_info *pci, const char *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) /* global NPE counter incremented by edac_pci_do_parity_check() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) atomic_inc(&pci->counters.npe_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (edac_pci_get_log_npe())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) edac_pci_printk(pci, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) "Non-Parity Error ctl: %s %d: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) pci->ctl_name, pci->pci_idx, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) * poke all PCI devices and see which one is the troublemaker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * panic() is called if set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) edac_pci_do_parity_check();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) EXPORT_SYMBOL_GPL(edac_pci_handle_npe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * Define the PCI parameter to the module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) module_param(check_pci_errors, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) MODULE_PARM_DESC(check_pci_errors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) "Check for PCI bus parity errors: 0=off 1=on");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) module_param(edac_pci_panic_on_pe, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) MODULE_PARM_DESC(edac_pci_panic_on_pe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) "Panic on PCI Bus Parity error: 0=off 1=on");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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