^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Defines, structures, APIs for edac_pci and edac_pci_sysfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * (C) 2007 Linux Networx (http://lnxi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This file may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Written by Thayne Harbaugh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Based on work by Dan Hollis <goemon at anime dot net> and others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * http://www.anime.net/~goemon/linux-ecc/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * NMI handling support added by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Refactored for multi-source files:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Doug Thompson <norsk5@xmission.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Please look at Documentation/driver-api/edac.rst for more info about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * EDAC core structs and functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifndef _EDAC_PCI_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define _EDAC_PCI_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/edac.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/kobject.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct edac_pci_counter {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) atomic_t pe_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) atomic_t npe_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Abstract edac_pci control info structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct edac_pci_ctl_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* for global list of edac_pci_ctl_info structs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct list_head link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int pci_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct bus_type *edac_subsys; /* pointer to subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* the internal state of this controller instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int op_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* work struct for this instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct delayed_work work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* pointer to edac polling checking routine:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * If NOT NULL: points to polling check routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * If NULL: Then assumes INTERRUPT operation, where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * MC driver will receive events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct device *dev; /* pointer to device structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) const char *mod_name; /* module name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) const char *ctl_name; /* edac controller name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) const char *dev_name; /* pci/platform/etc... name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) void *pvt_info; /* pointer to 'private driver' info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned long start_time; /* edac_pci load start time (jiffies) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct completion complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* sysfs top name under 'edac' directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * and instance name:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * cpu/cpu0/...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * cpu/cpu1/...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * cpu/cpu2/...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) char name[EDAC_DEVICE_NAME_LEN + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* Event counters for the this whole EDAC Device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct edac_pci_counter counters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* edac sysfs device control for the 'name'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * device this structure controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct kobject kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define to_edac_pci_ctl_work(w) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) container_of(w, struct edac_pci_ctl_info,work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* write all or some bits in a byte-register*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u8 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (mask != 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u8 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pci_read_config_byte(pdev, offset, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) value &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) buf &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) value |= buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pci_write_config_byte(pdev, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* write all or some bits in a word-register*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u16 value, u16 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (mask != 0xffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u16 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) pci_read_config_word(pdev, offset, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) value &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) buf &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) value |= buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) pci_write_config_word(pdev, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * pci_write_bits32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * edac local routine to do pci_write_config_dword, but adds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * a mask parameter. If mask is all ones, ignore the mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * Otherwise utilize the mask to isolate specified bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * write all or some bits in a dword-register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u32 value, u32 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (mask != 0xffffffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u32 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) pci_read_config_dword(pdev, offset, &buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) value &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) buf &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) value |= buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pci_write_config_dword(pdev, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #endif /* CONFIG_PCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * edac_pci APIs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * edac_pci_alloc_ctl_info:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * The alloc() function for the 'edac_pci' control info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * @sz_pvt: size of the private info at struct &edac_pci_ctl_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * @edac_pci_name: name of the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * The chip driver will allocate one of these for each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * edac_pci it is going to control/register with the EDAC CORE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Returns: a pointer to struct &edac_pci_ctl_info on success; %NULL otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) const char *edac_pci_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * edac_pci_free_ctl_info():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * Last action on the pci control structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * @pci: pointer to struct &edac_pci_ctl_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * Calls the remove sysfs information, which will unregister
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * this control struct's kobj. When that kobj's ref count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * goes to zero, its release function will be call and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * kfree() the memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * edac_pci_alloc_index: Allocate a unique PCI index number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * allocated index number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) extern int edac_pci_alloc_index(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * edac_pci_add_device(): Insert the 'edac_dev' structure into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * edac_pci global list and create sysfs entries associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * edac_pci structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * @pci: pointer to the edac_device structure to be added to the list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * @edac_idx: A unique numeric identifier to be assigned to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * 'edac_pci' structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * 0 on Success, or an error code on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * edac_pci_del_device()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * Remove sysfs entries for specified edac_pci structure and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * then remove edac_pci structure from global list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * Pointer to 'struct device' representing edac_pci structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * to remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * Pointer to removed edac_pci structure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * or %NULL if device not found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * edac_pci_create_generic_ctl()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * A generic constructor for a PCI parity polling device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * Some systems have more than one domain of PCI busses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * For systems with one domain, then this API will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * provide for a generic poller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @dev: pointer to struct &device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @mod_name: name of the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * This routine calls the edac_pci_alloc_ctl_info() for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * the generic device, with default values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * Returns: Pointer to struct &edac_pci_ctl_info on success, %NULL on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) const char *mod_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * edac_pci_release_generic_ctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * The release function of a generic EDAC PCI polling device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * @pci: pointer to struct &edac_pci_ctl_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * edac_pci_create_sysfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * Create the controls/attributes for the specified EDAC PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * @pci: pointer to struct &edac_pci_ctl_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * edac_pci_remove_sysfs()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * remove the controls and attributes for this EDAC PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * @pci: pointer to struct &edac_pci_ctl_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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