^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Qualcomm Technologies HIDMA Management common header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) struct hidma_mgmt_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) u8 hw_version_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) u8 hw_version_minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) u32 max_wr_xactions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) u32 max_rd_xactions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) u32 max_write_request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) u32 max_read_request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) u32 dma_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u32 chreset_timeout_cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u32 hw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u32 *priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u32 *weight;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Hardware device constants */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void __iomem *virtaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) resource_size_t addrsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct kobject **chroots;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int hidma_mgmt_init_sys(struct hidma_mgmt_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int hidma_mgmt_setup(struct hidma_mgmt_dev *mgmtdev);