Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) config MTK_HSDMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 	tristate "MediaTek High-Speed DMA controller support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	depends on ARCH_MEDIATEK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	select DMA_ENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	select DMA_VIRTUAL_CHANNELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	  Enable support for High-Speed DMA controller on MediaTek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	  SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	  This controller provides the channels which is dedicated to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	  memory-to-memory transfer to offload from CPU through ring-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	  based descriptor management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) config MTK_CQDMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	tristate "MediaTek Command-Queue DMA controller support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	depends on ARCH_MEDIATEK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	select DMA_ENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	select DMA_VIRTUAL_CHANNELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	  Enable support for Command-Queue DMA controller on MediaTek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	  SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	  This controller provides the channels which is dedicated to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	  memory-to-memory transfer to offload from CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) config MTK_UART_APDMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	tristate "MediaTek SoCs APDMA support for UART"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	depends on OF && SERIAL_8250_MT6577
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	select DMA_ENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	select DMA_VIRTUAL_CHANNELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	  Support for the UART DMA engine found on MediaTek MTK SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	  When SERIAL_8250_MT6577 is enabled, and if you want to use DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	  you can enable the config. The DMA engine can only be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	  with MediaTek SoCs.