^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * DMA Router driver for LPC18xx/43xx DMA MUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on TI DMA Crossbar driver by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* CREG register offset and macros for mux manipulation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LPC18XX_CREG_DMAMUX 0x11c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define LPC18XX_DMAMUX_VAL(v, n) ((v) << (n * 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LPC18XX_DMAMUX_MASK(n) (0x3 << (n * 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define LPC18XX_DMAMUX_MAX_VAL 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct lpc18xx_dmamux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) bool busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct lpc18xx_dmamux_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct dma_router dmarouter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct lpc18xx_dmamux *muxes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 dma_master_requests;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 dma_mux_requests;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct regmap *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static void lpc18xx_dmamux_free(struct device *dev, void *route_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct lpc18xx_dmamux_data *dmamux = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct lpc18xx_dmamux *mux = route_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) spin_lock_irqsave(&dmamux->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mux->busy = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) spin_unlock_irqrestore(&dmamux->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static void *lpc18xx_dmamux_reserve(struct of_phandle_args *dma_spec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct of_dma *ofdma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct lpc18xx_dmamux_data *dmamux = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) unsigned mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (dma_spec->args_count != 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dev_err(&pdev->dev, "invalid number of dma mux args\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) mux = dma_spec->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (mux >= dmamux->dma_master_requests) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) dev_err(&pdev->dev, "invalid mux number: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dma_spec->args[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (dma_spec->args[1] > LPC18XX_DMAMUX_MAX_VAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) dev_err(&pdev->dev, "invalid dma mux value: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) dma_spec->args[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* The of_node_put() will be done in the core for the node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (!dma_spec->np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dev_err(&pdev->dev, "can't get dma master\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) spin_lock_irqsave(&dmamux->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (dmamux->muxes[mux].busy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) spin_unlock_irqrestore(&dmamux->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) dev_err(&pdev->dev, "dma request %u busy with %u.%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) mux, mux, dmamux->muxes[mux].value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) of_node_put(dma_spec->np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) dmamux->muxes[mux].busy = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dmamux->muxes[mux].value = dma_spec->args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) regmap_update_bits(dmamux->reg, LPC18XX_CREG_DMAMUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) LPC18XX_DMAMUX_MASK(mux),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) LPC18XX_DMAMUX_VAL(dmamux->muxes[mux].value, mux));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) spin_unlock_irqrestore(&dmamux->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) dma_spec->args[1] = dma_spec->args[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) dma_spec->args_count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) dev_dbg(&pdev->dev, "mapping dmamux %u.%u to dma request %u\n", mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) dmamux->muxes[mux].value, mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return &dmamux->muxes[mux];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int lpc18xx_dmamux_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct device_node *dma_np, *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct lpc18xx_dmamux_data *dmamux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (!dmamux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dmamux->reg = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (IS_ERR(dmamux->reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_err(&pdev->dev, "syscon lookup failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return PTR_ERR(dmamux->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = of_property_read_u32(np, "dma-requests",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) &dmamux->dma_mux_requests);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dev_err(&pdev->dev, "missing dma-requests property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dma_np = of_parse_phandle(np, "dma-masters", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!dma_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_err(&pdev->dev, "can't get dma master\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ret = of_property_read_u32(dma_np, "dma-requests",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) &dmamux->dma_master_requests);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) of_node_put(dma_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dev_err(&pdev->dev, "missing master dma-requests property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dmamux->muxes = devm_kcalloc(&pdev->dev, dmamux->dma_master_requests,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) sizeof(struct lpc18xx_dmamux),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (!dmamux->muxes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) spin_lock_init(&dmamux->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) platform_set_drvdata(pdev, dmamux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dmamux->dmarouter.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) dmamux->dmarouter.route_free = lpc18xx_dmamux_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return of_dma_router_register(np, lpc18xx_dmamux_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) &dmamux->dmarouter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const struct of_device_id lpc18xx_dmamux_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { .compatible = "nxp,lpc1850-dmamux" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static struct platform_driver lpc18xx_dmamux_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .probe = lpc18xx_dmamux_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .name = "lpc18xx-dmamux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .of_match_table = lpc18xx_dmamux_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int __init lpc18xx_dmamux_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return platform_driver_register(&lpc18xx_dmamux_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) arch_initcall(lpc18xx_dmamux_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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