Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Platform driver for the Synopsys DesignWare DMA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2007-2008 Atmel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2010-2011 ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2013 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Some parts of this driver are derived from the original dw_dmac.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include "internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define DRV_NAME	"dw_dmac"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static int dw_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	const struct dw_dma_chip_pdata *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct dw_dma_chip_pdata *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct dw_dma_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	match = device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	if (!match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	data = devm_kmemdup(&pdev->dev, match, sizeof(*match), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	chip->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	if (chip->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		return chip->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	chip->regs = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	if (IS_ERR(chip->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		return PTR_ERR(chip->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	if (!data->pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		data->pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (!data->pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		data->pdata = dw_dma_parse_dt(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	chip->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	chip->id = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	chip->pdata = data->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	data->chip = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	chip->clk = devm_clk_get_optional(chip->dev, "hclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (IS_ERR(chip->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		return PTR_ERR(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	err = clk_prepare_enable(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	pm_runtime_enable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	err = data->probe(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		goto err_dw_dma_probe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	dw_dma_of_controller_register(chip->dw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	dw_dma_acpi_controller_register(chip->dw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) err_dw_dma_probe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	clk_disable_unprepare(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static int dw_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct dw_dma_chip_pdata *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	struct dw_dma_chip *chip = data->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	dw_dma_acpi_controller_free(chip->dw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	dw_dma_of_controller_free(chip->dw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	ret = data->remove(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		dev_warn(chip->dev, "can't remove device properly: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	clk_disable_unprepare(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static void dw_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct dw_dma_chip_pdata *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	struct dw_dma_chip *chip = data->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	 * We have to call do_dw_dma_disable() to stop any ongoing transfer. On
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	 * some platforms we can't do that since DMA device is powered off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	 * Moreover we have no possibility to check if the platform is affected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	 * unconditionally. On the other hand we can't use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	 * pm_runtime_suspended() because runtime PM framework is not fully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 * used by the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	pm_runtime_get_sync(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	do_dw_dma_disable(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	pm_runtime_put_sync_suspend(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	clk_disable_unprepare(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const struct of_device_id dw_dma_of_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	{ .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const struct acpi_device_id dw_dma_acpi_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	{ "INTL9C60", (kernel_ulong_t)&dw_dma_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	{ "80862286", (kernel_ulong_t)&dw_dma_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	{ "808622C0", (kernel_ulong_t)&dw_dma_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	/* Elkhart Lake iDMA 32-bit (PSE DMA) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	{ "80864BB4", (kernel_ulong_t)&idma32_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	{ "80864BB5", (kernel_ulong_t)&idma32_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	{ "80864BB6", (kernel_ulong_t)&idma32_chip_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int dw_suspend_late(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	struct dw_dma_chip *chip = data->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	do_dw_dma_disable(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	clk_disable_unprepare(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int dw_resume_early(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct dw_dma_chip *chip = data->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	ret = clk_prepare_enable(chip->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return do_dw_dma_enable(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #endif /* CONFIG_PM_SLEEP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const struct dev_pm_ops dw_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static struct platform_driver dw_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.probe		= dw_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.remove		= dw_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.shutdown       = dw_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		.name	= DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		.pm	= &dw_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		.of_match_table = of_match_ptr(dw_dma_of_id_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int __init dw_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	return platform_driver_register(&dw_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) subsys_initcall(dw_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static void __exit dw_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	platform_driver_unregister(&dw_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) module_exit(dw_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MODULE_ALIAS("platform:" DRV_NAME);