^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * DMA Engine test module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007 Atmel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2013 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/freezer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/sched/task.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static unsigned int test_buf_size = 16384;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static char test_device[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) module_param_string(device, test_device, sizeof(test_device),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static unsigned int threads_per_chan = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MODULE_PARM_DESC(threads_per_chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "Number of threads to start per channel (default: 1)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static unsigned int max_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) module_param(max_channels, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MODULE_PARM_DESC(max_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) "Maximum number of channels to use (default: all)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static unsigned int iterations;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) module_param(iterations, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MODULE_PARM_DESC(iterations,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "Iterations before stopping test (default: infinite)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static unsigned int dmatest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) module_param(dmatest, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MODULE_PARM_DESC(dmatest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "dmatest 0-memcpy 1-memset (default: 0)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static unsigned int xor_sources = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MODULE_PARM_DESC(xor_sources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) "Number of xor source buffers (default: 3)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static unsigned int pq_sources = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MODULE_PARM_DESC(pq_sources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) "Number of p+q source buffers (default: 3)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int timeout = 3000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) module_param(timeout, int, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "Pass -1 for infinite timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static bool noverify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) module_param(noverify, bool, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static bool norandom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) module_param(norandom, bool, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static bool verbose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) module_param(verbose, bool, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int alignment = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) module_param(alignment, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MODULE_PARM_DESC(alignment, "Custom data address alignment taken as 2^(alignment) (default: not used (-1))");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static unsigned int transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) module_param(transfer_size, uint, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MODULE_PARM_DESC(transfer_size, "Optional custom transfer size in bytes (default: not used (0))");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static bool polled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) module_param(polled, bool, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MODULE_PARM_DESC(polled, "Use polling for completion instead of interrupts");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * struct dmatest_params - test parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @buf_size: size of the memcpy test buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @channel: bus ID of the channel to test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @device: bus ID of the DMA Engine to test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @threads_per_chan: number of threads to start per channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @max_channels: maximum number of channels to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @iterations: iterations before stopping test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @xor_sources: number of xor source buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @pq_sources: number of p+q source buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @timeout: transfer timeout in msec, -1 for infinite timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @noverify: disable data verification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @norandom: disable random offset setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @alignment: custom data address alignment taken as 2^alignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @transfer_size: custom transfer size in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @polled: use polling for completion instead of interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct dmatest_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned int buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) char channel[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) char device[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned int threads_per_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned int max_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) unsigned int iterations;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int xor_sources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned int pq_sources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) bool noverify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) bool norandom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned int transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) bool polled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * struct dmatest_info - test information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @params: test parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @channels: channels under test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @nr_channels: number of channels under test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @lock: access protection to the fields of this structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @did_init: module has been initialized completely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @last_error: test has faced configuration issues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct dmatest_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Test parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct dmatest_params params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* Internal state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct list_head channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned int nr_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int last_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) bool did_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) } test_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .channels = LIST_HEAD_INIT(test_info.channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .lock = __MUTEX_INITIALIZER(test_info.lock),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int dmatest_run_set(const char *val, const struct kernel_param *kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int dmatest_run_get(char *val, const struct kernel_param *kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const struct kernel_param_ops run_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .set = dmatest_run_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .get = dmatest_run_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static bool dmatest_run;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_PARM_DESC(run, "Run the test (default: false)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static int dmatest_chan_set(const char *val, const struct kernel_param *kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int dmatest_chan_get(char *val, const struct kernel_param *kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const struct kernel_param_ops multi_chan_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .set = dmatest_chan_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .get = dmatest_chan_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static char test_channel[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct kparam_string newchan_kps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .string = test_channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .maxlen = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) module_param_cb(channel, &multi_chan_ops, &newchan_kps, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int dmatest_test_list_get(char *val, const struct kernel_param *kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const struct kernel_param_ops test_list_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .get = dmatest_test_list_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) module_param_cb(test_list, &test_list_ops, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MODULE_PARM_DESC(test_list, "Print current test list");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* Maximum amount of mismatched bytes in buffer to print */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define MAX_ERROR_COUNT 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * Initialization patterns. All bytes in the source buffer has bit 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * set, all bytes in the destination buffer has bit 7 cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * Bit 6 is set for all bytes which are to be copied by the DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * engine. Bit 5 is set for all bytes which are to be overwritten by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * the DMA engine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * The remaining bits are the inverse of a counter which increments by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * one for each byte address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define PATTERN_SRC 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define PATTERN_DST 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define PATTERN_COPY 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define PATTERN_OVERWRITE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define PATTERN_COUNT_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define PATTERN_MEMSET_IDX 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Fixed point arithmetic ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define FIXPT_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define FIXPNT_MASK 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define FIXPT_TO_INT(a) ((a) >> FIXPT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define INT_TO_FIXPT(a) ((a) << FIXPT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define FIXPT_GET_FRAC(a) ((((a) & FIXPNT_MASK) * 100) >> FIXPT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* poor man's completion - we want to use wait_event_freezable() on it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct dmatest_done {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) bool done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) wait_queue_head_t *wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct dmatest_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 **raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u8 **aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) unsigned int cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) unsigned int off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct dmatest_thread {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct dmatest_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct task_struct *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct dma_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct dmatest_data src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct dmatest_data dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) enum dma_transaction_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) wait_queue_head_t done_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct dmatest_done test_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) bool done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) bool pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct dmatest_chan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct dma_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct list_head threads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static bool wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static bool is_threaded_test_run(struct dmatest_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct dmatest_chan *dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) list_for_each_entry(dtc, &info->channels, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct dmatest_thread *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) list_for_each_entry(thread, &dtc->threads, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (!thread->done && !thread->pending)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static bool is_threaded_test_pending(struct dmatest_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct dmatest_chan *dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) list_for_each_entry(dtc, &info->channels, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct dmatest_thread *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) list_for_each_entry(thread, &dtc->threads, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (thread->pending)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static int dmatest_wait_get(char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct dmatest_params *params = &info->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (params->iterations)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) wait_event(thread_wait, !is_threaded_test_run(info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) wait = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return param_get_bool(val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static const struct kernel_param_ops wait_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .get = dmatest_wait_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .set = param_set_bool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static bool dmatest_match_channel(struct dmatest_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct dma_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (params->channel[0] == '\0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return strcmp(dma_chan_name(chan), params->channel) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static bool dmatest_match_device(struct dmatest_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct dma_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (params->device[0] == '\0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return strcmp(dev_name(device->dev), params->device) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static unsigned long dmatest_random(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) unsigned long buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) prandom_bytes(&buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static inline u8 gen_inv_idx(u8 index, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u8 val = is_memset ? PATTERN_MEMSET_IDX : index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return ~val & PATTERN_COUNT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static inline u8 gen_src_value(u8 index, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return PATTERN_SRC | gen_inv_idx(index, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static inline u8 gen_dst_value(u8 index, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return PATTERN_DST | gen_inv_idx(index, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) unsigned int buf_size, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) for (; (buf = *bufs); bufs++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) for (i = 0; i < start; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) buf[i] = gen_src_value(i, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) for ( ; i < start + len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) for ( ; i < buf_size; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) buf[i] = gen_src_value(i, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) unsigned int buf_size, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) for (; (buf = *bufs); bufs++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) for (i = 0; i < start; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) buf[i] = gen_dst_value(i, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) for ( ; i < start + len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) buf[i] = gen_dst_value(i, is_memset) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) PATTERN_OVERWRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) for ( ; i < buf_size; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) buf[i] = gen_dst_value(i, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) unsigned int counter, bool is_srcbuf, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u8 diff = actual ^ pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u8 expected = pattern | gen_inv_idx(counter, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) const char *thread_name = current->comm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (is_srcbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) thread_name, index, expected, actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) else if ((pattern & PATTERN_COPY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) thread_name, index, expected, actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) else if (diff & PATTERN_SRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) thread_name, index, expected, actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) thread_name, index, expected, actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) unsigned int end, unsigned int counter, u8 pattern,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) bool is_srcbuf, bool is_memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) unsigned int error_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u8 actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) u8 expected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) unsigned int counter_orig = counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) for (; (buf = *bufs); bufs++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) counter = counter_orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) for (i = start; i < end; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) actual = buf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) expected = pattern | gen_inv_idx(counter, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (actual != expected) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (error_count < MAX_ERROR_COUNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) dmatest_mismatch(actual, pattern, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) counter, is_srcbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) error_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) counter++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (error_count > MAX_ERROR_COUNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) pr_warn("%s: %u errors suppressed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) current->comm, error_count - MAX_ERROR_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return error_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static void dmatest_callback(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) struct dmatest_done *done = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct dmatest_thread *thread =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) container_of(done, struct dmatest_thread, test_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (!thread->done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) done->done = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) wake_up_all(done->wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * If thread->done, it means that this callback occurred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * after the parent thread has cleaned up. This can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * happen in the case that driver doesn't implement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * the terminate_all() functionality and a dma operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * did not occur within the timeout period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static unsigned int min_odd(unsigned int x, unsigned int y)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) unsigned int val = min(x, y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return val % 2 ? val : val - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static void result(const char *err, unsigned int n, unsigned int src_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned int dst_off, unsigned int len, unsigned long data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (IS_ERR_VALUE(data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%ld)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) current->comm, n, err, src_off, dst_off, len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) current->comm, n, err, src_off, dst_off, len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) unsigned int dst_off, unsigned int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) unsigned long data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) current->comm, n, err, src_off, dst_off, len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (verbose) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) result(err, n, src_off, dst_off, len, data); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) dbg_result(err, n, src_off, dst_off, len, data);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) unsigned long long per_sec = 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (runtime <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) /* drop precision until runtime is 32-bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) while (runtime > UINT_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) runtime >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) per_sec <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) per_sec *= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) per_sec = INT_TO_FIXPT(per_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) do_div(per_sec, runtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return per_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return FIXPT_TO_INT(dmatest_persec(runtime, len >> 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static void __dmatest_free_test_data(struct dmatest_data *d, unsigned int cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) for (i = 0; i < cnt; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) kfree(d->raw[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) kfree(d->aligned);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) kfree(d->raw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static void dmatest_free_test_data(struct dmatest_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) __dmatest_free_test_data(d, d->cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static int dmatest_alloc_test_data(struct dmatest_data *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) unsigned int buf_size, u8 align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) unsigned int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) d->raw = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (!d->raw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) d->aligned = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (!d->aligned)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) for (i = 0; i < d->cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) d->raw[i] = kmalloc(buf_size + align, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (!d->raw[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* align to alignment restriction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) d->aligned[i] = PTR_ALIGN(d->raw[i], align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) d->aligned[i] = d->raw[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) __dmatest_free_test_data(d, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * This function repeatedly tests DMA transfers of various lengths and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) * offsets for a given operation type until it is told to exit by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) * kthread_stop(). There may be multiple threads running this function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * in parallel for a single channel, and there may be multiple channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * being tested in parallel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * Before each test, the source and destination buffer is initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * with a known pattern. This pattern is different depending on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * whether it's in an area which is supposed to be copied or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * overwritten, and different in the source and destination buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * So if the DMA engine doesn't copy exactly what we tell it to copy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * we'll notice.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static int dmatest_func(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) struct dmatest_thread *thread = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) struct dmatest_done *done = &thread->test_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct dmatest_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) struct dmatest_params *params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) struct dma_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct dma_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) unsigned int error_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) unsigned int failed_tests = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) unsigned int total_tests = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dma_cookie_t cookie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) enum dma_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) enum dma_ctrl_flags flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) u8 *pq_coefs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) unsigned int buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) struct dmatest_data *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct dmatest_data *dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) ktime_t ktime, start, diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ktime_t filltime = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ktime_t comparetime = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) s64 runtime = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) unsigned long long total_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) unsigned long long iops = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u8 align = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) bool is_memset = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) dma_addr_t *srcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) dma_addr_t *dma_pq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) set_freezable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) smp_rmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) thread->pending = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) info = thread->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) params = &info->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) chan = thread->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) dev = chan->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) src = &thread->src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) dst = &thread->dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) if (thread->type == DMA_MEMCPY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) align = params->alignment < 0 ? dev->copy_align :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) params->alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) src->cnt = dst->cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) } else if (thread->type == DMA_MEMSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) align = params->alignment < 0 ? dev->fill_align :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) params->alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) src->cnt = dst->cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) is_memset = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) } else if (thread->type == DMA_XOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* force odd to ensure dst = src */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) src->cnt = min_odd(params->xor_sources | 1, dev->max_xor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) dst->cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) align = params->alignment < 0 ? dev->xor_align :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) params->alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) } else if (thread->type == DMA_PQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /* force odd to ensure dst = src */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) src->cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) dst->cnt = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) align = params->alignment < 0 ? dev->pq_align :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) params->alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (!pq_coefs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) goto err_thread_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) for (i = 0; i < src->cnt; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) pq_coefs[i] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) goto err_thread_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) /* Check if buffer count fits into map count variable (u8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if ((src->cnt + dst->cnt) >= 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) pr_err("too many buffers (%d of 255 supported)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) src->cnt + dst->cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) goto err_free_coefs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) buf_size = params->buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (1 << align > buf_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) pr_err("%u-byte buffer too small for %d-byte alignment\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) buf_size, 1 << align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) goto err_free_coefs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (dmatest_alloc_test_data(src, buf_size, align) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) goto err_free_coefs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (dmatest_alloc_test_data(dst, buf_size, align) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) goto err_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) set_user_nice(current, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) srcs = kcalloc(src->cnt, sizeof(dma_addr_t), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (!srcs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) goto err_dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) dma_pq = kcalloc(dst->cnt, sizeof(dma_addr_t), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (!dma_pq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) goto err_srcs_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * src and dst buffers are freed by ourselves below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (params->polled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) flags = DMA_CTRL_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) ktime = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) while (!(kthread_should_stop() ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) (params->iterations && total_tests >= params->iterations))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) struct dma_async_tx_descriptor *tx = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct dmaengine_unmap_data *um;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) dma_addr_t *dsts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) total_tests++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (params->transfer_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (params->transfer_size >= buf_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) pr_err("%u-byte transfer size must be lower than %u-buffer size\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) params->transfer_size, buf_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) len = params->transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) } else if (params->norandom) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) len = buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) len = dmatest_random() % buf_size + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) /* Do not alter transfer size explicitly defined by user */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (!params->transfer_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) len = (len >> align) << align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (!len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) len = 1 << align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) total_len += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (params->norandom) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) src->off = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) dst->off = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) src->off = dmatest_random() % (buf_size - len + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) dst->off = dmatest_random() % (buf_size - len + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) src->off = (src->off >> align) << align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) dst->off = (dst->off >> align) << align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (!params->noverify) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) start = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) dmatest_init_srcs(src->aligned, src->off, len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) buf_size, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) dmatest_init_dsts(dst->aligned, dst->off, len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) buf_size, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) diff = ktime_sub(ktime_get(), start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) filltime = ktime_add(filltime, diff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) um = dmaengine_get_unmap_data(dev->dev, src->cnt + dst->cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (!um) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) failed_tests++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) result("unmap data NULL", total_tests,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) src->off, dst->off, len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) um->len = buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) for (i = 0; i < src->cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) void *buf = src->aligned[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) struct page *pg = virt_to_page(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) unsigned long pg_off = offset_in_page(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) um->len, DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) srcs[i] = um->addr[i] + src->off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) ret = dma_mapping_error(dev->dev, um->addr[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) result("src mapping error", total_tests,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) src->off, dst->off, len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) goto error_unmap_continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) um->to_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) dsts = &um->addr[src->cnt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) for (i = 0; i < dst->cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) void *buf = dst->aligned[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) struct page *pg = virt_to_page(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) unsigned long pg_off = offset_in_page(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) DMA_BIDIRECTIONAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) ret = dma_mapping_error(dev->dev, dsts[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) result("dst mapping error", total_tests,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) src->off, dst->off, len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) goto error_unmap_continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) um->bidi_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (thread->type == DMA_MEMCPY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) tx = dev->device_prep_dma_memcpy(chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) dsts[0] + dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) srcs[0], len, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) else if (thread->type == DMA_MEMSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) tx = dev->device_prep_dma_memset(chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) dsts[0] + dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) *(src->aligned[0] + src->off),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) len, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) else if (thread->type == DMA_XOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) tx = dev->device_prep_dma_xor(chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) dsts[0] + dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) srcs, src->cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) len, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) else if (thread->type == DMA_PQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) for (i = 0; i < dst->cnt; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) dma_pq[i] = dsts[i] + dst->off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) src->cnt, pq_coefs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) len, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) if (!tx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) result("prep error", total_tests, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) dst->off, len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) goto error_unmap_continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) done->done = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (!params->polled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) tx->callback = dmatest_callback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) tx->callback_param = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) cookie = tx->tx_submit(tx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (dma_submit_error(cookie)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) result("submit error", total_tests, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) dst->off, len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) goto error_unmap_continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) if (params->polled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) status = dma_sync_wait(chan, cookie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) dmaengine_terminate_sync(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) if (status == DMA_COMPLETE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) done->done = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) dma_async_issue_pending(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) wait_event_freezable_timeout(thread->done_wait,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) done->done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) msecs_to_jiffies(params->timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) status = dma_async_is_tx_complete(chan, cookie, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (!done->done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) result("test timed out", total_tests, src->off, dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) len, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) goto error_unmap_continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) } else if (status != DMA_COMPLETE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) !(dma_has_cap(DMA_COMPLETION_NO_ORDER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) dev->cap_mask) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) status == DMA_OUT_OF_ORDER)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) result(status == DMA_ERROR ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) "completion error status" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) "completion busy status", total_tests, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) dst->off, len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) goto error_unmap_continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) dmaengine_unmap_put(um);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) if (params->noverify) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) verbose_result("test passed", total_tests, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) dst->off, len, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) start = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) pr_debug("%s: verifying source buffer...\n", current->comm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) error_count = dmatest_verify(src->aligned, 0, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) 0, PATTERN_SRC, true, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) error_count += dmatest_verify(src->aligned, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) src->off + len, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) PATTERN_SRC | PATTERN_COPY, true, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) error_count += dmatest_verify(src->aligned, src->off + len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) buf_size, src->off + len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) PATTERN_SRC, true, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) pr_debug("%s: verifying dest buffer...\n", current->comm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) error_count += dmatest_verify(dst->aligned, 0, dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) 0, PATTERN_DST, false, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) error_count += dmatest_verify(dst->aligned, dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) dst->off + len, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) PATTERN_SRC | PATTERN_COPY, false, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) error_count += dmatest_verify(dst->aligned, dst->off + len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) buf_size, dst->off + len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) PATTERN_DST, false, is_memset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) diff = ktime_sub(ktime_get(), start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) comparetime = ktime_add(comparetime, diff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) if (error_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) result("data error", total_tests, src->off, dst->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) len, error_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) failed_tests++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) verbose_result("test passed", total_tests, src->off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) dst->off, len, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) error_unmap_continue:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) dmaengine_unmap_put(um);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) failed_tests++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) ktime = ktime_sub(ktime_get(), ktime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) ktime = ktime_sub(ktime, comparetime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) ktime = ktime_sub(ktime, filltime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) runtime = ktime_to_us(ktime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) kfree(dma_pq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) err_srcs_array:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) kfree(srcs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) err_dst:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) dmatest_free_test_data(dst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) err_src:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) dmatest_free_test_data(src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) err_free_coefs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) kfree(pq_coefs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) err_thread_type:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) iops = dmatest_persec(runtime, total_tests);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) pr_info("%s: summary %u tests, %u failures %llu.%02llu iops %llu KB/s (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) current->comm, total_tests, failed_tests,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) FIXPT_TO_INT(iops), FIXPT_GET_FRAC(iops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) dmatest_KBs(runtime, total_len), ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) /* terminate all transfers on specified channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) if (ret || failed_tests)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) dmaengine_terminate_sync(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) thread->done = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) wake_up(&thread_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) struct dmatest_thread *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) struct dmatest_thread *_thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) ret = kthread_stop(thread->task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) pr_debug("thread %s exited with status %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) thread->task->comm, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) list_del(&thread->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) put_task_struct(thread->task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) kfree(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) /* terminate all transfers on specified channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) dmaengine_terminate_sync(dtc->chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) kfree(dtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static int dmatest_add_threads(struct dmatest_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) struct dmatest_chan *dtc, enum dma_transaction_type type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct dmatest_params *params = &info->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) struct dmatest_thread *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) struct dma_chan *chan = dtc->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) char *op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (type == DMA_MEMCPY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) op = "copy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) else if (type == DMA_MEMSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) op = "set";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) else if (type == DMA_XOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) op = "xor";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) else if (type == DMA_PQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) op = "pq";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) for (i = 0; i < params->threads_per_chan; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) if (!thread) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) pr_warn("No memory for %s-%s%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) dma_chan_name(chan), op, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) thread->info = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) thread->chan = dtc->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) thread->type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) thread->test_done.wait = &thread->done_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) init_waitqueue_head(&thread->done_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) smp_wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) dma_chan_name(chan), op, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) if (IS_ERR(thread->task)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) pr_warn("Failed to create thread %s-%s%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) dma_chan_name(chan), op, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) kfree(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) /* srcbuf and dstbuf are allocated by the thread itself */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) get_task_struct(thread->task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) list_add_tail(&thread->node, &dtc->threads);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) thread->pending = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) static int dmatest_add_channel(struct dmatest_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) struct dma_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) struct dmatest_chan *dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) struct dma_device *dma_dev = chan->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) unsigned int thread_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) int cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) if (!dtc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) pr_warn("No memory for %s\n", dma_chan_name(chan));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) dtc->chan = chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) INIT_LIST_HEAD(&dtc->threads);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) info->params.polled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) info->params.polled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) if (dmatest == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) thread_count += cnt > 0 ? cnt : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) if (dmatest == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) cnt = dmatest_add_threads(info, dtc, DMA_MEMSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) thread_count += cnt > 0 ? cnt : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) cnt = dmatest_add_threads(info, dtc, DMA_XOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) thread_count += cnt > 0 ? cnt : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) cnt = dmatest_add_threads(info, dtc, DMA_PQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) thread_count += cnt > 0 ? cnt : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) pr_info("Added %u threads using %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) thread_count, dma_chan_name(chan));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) list_add_tail(&dtc->node, &info->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) info->nr_channels++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) static bool filter(struct dma_chan *chan, void *param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) return dmatest_match_channel(param, chan) && dmatest_match_device(param, chan->device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) static void request_channels(struct dmatest_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) enum dma_transaction_type type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) dma_cap_mask_t mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dma_cap_zero(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) dma_cap_set(type, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) struct dmatest_params *params = &info->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) struct dma_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) chan = dma_request_channel(mask, filter, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) if (chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) if (dmatest_add_channel(info, chan)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) dma_release_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) break; /* add_channel failed, punt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) break; /* no more channels available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) if (params->max_channels &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) info->nr_channels >= params->max_channels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) break; /* we have all we need */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) static void add_threaded_test(struct dmatest_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) struct dmatest_params *params = &info->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) /* Copy test parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) params->buf_size = test_buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) strlcpy(params->device, strim(test_device), sizeof(params->device));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) params->threads_per_chan = threads_per_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) params->max_channels = max_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) params->iterations = iterations;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) params->xor_sources = xor_sources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) params->pq_sources = pq_sources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) params->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) params->noverify = noverify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) params->norandom = norandom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) params->alignment = alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) params->transfer_size = transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) params->polled = polled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) request_channels(info, DMA_MEMCPY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) request_channels(info, DMA_MEMSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) request_channels(info, DMA_XOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) request_channels(info, DMA_PQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) static void run_pending_tests(struct dmatest_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) struct dmatest_chan *dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) unsigned int thread_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) list_for_each_entry(dtc, &info->channels, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) struct dmatest_thread *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) thread_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) list_for_each_entry(thread, &dtc->threads, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) wake_up_process(thread->task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) thread_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) pr_info("Started %u threads using %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) thread_count, dma_chan_name(dtc->chan));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) static void stop_threaded_test(struct dmatest_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) struct dmatest_chan *dtc, *_dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) struct dma_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) list_del(&dtc->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) chan = dtc->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) dmatest_cleanup_channel(dtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) pr_debug("dropped channel %s\n", dma_chan_name(chan));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) dma_release_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) info->nr_channels = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) static void start_threaded_tests(struct dmatest_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) /* we might be called early to set run=, defer running until all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) * parameters have been evaluated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) if (!info->did_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) run_pending_tests(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) static int dmatest_run_get(char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) if (is_threaded_test_run(info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) dmatest_run = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) if (!is_threaded_test_pending(info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) stop_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) dmatest_run = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) return param_get_bool(val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) static int dmatest_run_set(const char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) ret = param_set_bool(val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) } else if (dmatest_run) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) if (!is_threaded_test_pending(info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) * We have nothing to run. This can be due to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) ret = info->last_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) /* 1) Misconfiguration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) pr_err("Channel misconfigured, can't continue\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) /* 2) We rely on defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) pr_info("No channels configured, continue with any\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if (!is_threaded_test_run(info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) stop_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) add_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) start_threaded_tests(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) stop_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static int dmatest_chan_set(const char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) struct dmatest_chan *dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) char chan_reset_val[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) ret = param_set_copystring(val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /*Clear any previously run threads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) if (!is_threaded_test_run(info) && !is_threaded_test_pending(info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) stop_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) /* Reject channels that are already registered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) if (is_threaded_test_pending(info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) list_for_each_entry(dtc, &info->channels, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) if (strcmp(dma_chan_name(dtc->chan),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) strim(test_channel)) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dtc = list_last_entry(&info->channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) struct dmatest_chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) strlcpy(chan_reset_val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) dma_chan_name(dtc->chan),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) sizeof(chan_reset_val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) goto add_chan_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) add_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) /* Check if channel was added successfully */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) if (!list_empty(&info->channels)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) * if new channel was not successfully added, revert the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) * "test_channel" string to the name of the last successfully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) * added channel. exception for when users issues empty string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) * to channel parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) dtc = list_last_entry(&info->channels, struct dmatest_chan, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) if ((strcmp(dma_chan_name(dtc->chan), strim(test_channel)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) && (strcmp("", strim(test_channel)) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) strlcpy(chan_reset_val, dma_chan_name(dtc->chan),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) sizeof(chan_reset_val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) goto add_chan_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) /* Clear test_channel if no channels were added successfully */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) strlcpy(chan_reset_val, "", sizeof(chan_reset_val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) goto add_chan_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) info->last_error = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) add_chan_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) param_set_copystring(chan_reset_val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) info->last_error = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) static int dmatest_chan_get(char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) if (!is_threaded_test_run(info) && !is_threaded_test_pending(info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) stop_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) strlcpy(test_channel, "", sizeof(test_channel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) return param_get_string(val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) static int dmatest_test_list_get(char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) struct dmatest_chan *dtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) unsigned int thread_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) list_for_each_entry(dtc, &info->channels, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) struct dmatest_thread *thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) thread_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) list_for_each_entry(thread, &dtc->threads, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) thread_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) pr_info("%u threads using %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) thread_count, dma_chan_name(dtc->chan));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) static int __init dmatest_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) struct dmatest_params *params = &info->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) if (dmatest_run) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) add_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) run_pending_tests(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) if (params->iterations && wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) wait_event(thread_wait, !is_threaded_test_run(info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) /* module parameters are stable, inittime tests are started,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) * let userspace take over 'run' control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) info->did_init = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) /* when compiled-in wait for drivers to load first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) late_initcall(dmatest_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) static void __exit dmatest_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) struct dmatest_info *info = &test_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) mutex_lock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) stop_threaded_test(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) mutex_unlock(&info->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) module_exit(dmatest_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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