^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Simple memory allocator for on-board SRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Maintainer : Sylvain Munaut <tnt@246tNt.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2005 Sylvain Munaut <tnt@246tNt.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This file is licensed under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * version 2. This program is licensed "as is" without any warranty of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/fsl/bestcomm/sram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Struct keeping our 'state' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct bcom_sram *bcom_sram = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) EXPORT_SYMBOL_GPL(bcom_sram); /* needed for inline functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* ======================================================================== */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Public API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* ======================================================================== */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* DO NOT USE in interrupts, if needed in irq handler, we should use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) _irqsave version of the spin_locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int bcom_sram_init(struct device_node *sram_node, char *owner)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) const u32 *regaddr_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u64 regaddr64, size64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int psize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Create our state struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (bcom_sram) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) printk(KERN_ERR "%s: bcom_sram_init: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "Already initialized !\n", owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) bcom_sram = kmalloc(sizeof(struct bcom_sram), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (!bcom_sram) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) printk(KERN_ERR "%s: bcom_sram_init: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "Couldn't allocate internal state !\n", owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Get address and size of the sram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) regaddr_p = of_get_address(sram_node, 0, &size64, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (!regaddr_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) printk(KERN_ERR "%s: bcom_sram_init: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "Invalid device node !\n", owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) rv = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) goto error_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) regaddr64 = of_translate_address(sram_node, regaddr_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) bcom_sram->base_phys = (phys_addr_t) regaddr64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) bcom_sram->size = (unsigned int) size64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Request region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!request_mem_region(bcom_sram->base_phys, bcom_sram->size, owner)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) printk(KERN_ERR "%s: bcom_sram_init: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) "Couldn't request region !\n", owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) rv = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) goto error_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* Map SRAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* sram is not really __iomem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) bcom_sram->base_virt = (void*) ioremap(bcom_sram->base_phys, bcom_sram->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (!bcom_sram->base_virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) printk(KERN_ERR "%s: bcom_sram_init: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) "Map error SRAM zone 0x%08lx (0x%0x)!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) owner, (long)bcom_sram->base_phys, bcom_sram->size );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) rv = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) goto error_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Create an rheap (defaults to 32 bits word alignment) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) bcom_sram->rh = rh_create(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Attach the free zones */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* Currently disabled ... for future use only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) reg_addr_p = of_get_property(sram_node, "available", &psize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) regaddr_p = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) psize = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (!regaddr_p || !psize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Attach the whole zone */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) rh_attach_region(bcom_sram->rh, 0, bcom_sram->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* Attach each zone independently */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) while (psize >= 2 * sizeof(u32)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) phys_addr_t zbase = of_translate_address(sram_node, regaddr_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) rh_attach_region(bcom_sram->rh, zbase - bcom_sram->base_phys, regaddr_p[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) regaddr_p += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) psize -= 2 * sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Init our spinlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) spin_lock_init(&bcom_sram->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) error_release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) release_mem_region(bcom_sram->base_phys, bcom_sram->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) error_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) kfree(bcom_sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) bcom_sram = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) EXPORT_SYMBOL_GPL(bcom_sram_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) void bcom_sram_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Free resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (bcom_sram) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) rh_destroy(bcom_sram->rh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) iounmap((void __iomem *)bcom_sram->base_virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) release_mem_region(bcom_sram->base_phys, bcom_sram->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) kfree(bcom_sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) bcom_sram = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) EXPORT_SYMBOL_GPL(bcom_sram_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) void* bcom_sram_alloc(int size, int align, phys_addr_t *phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned long offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) spin_lock(&bcom_sram->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) offset = rh_alloc_align(bcom_sram->rh, size, align, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) spin_unlock(&bcom_sram->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (IS_ERR_VALUE(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *phys = bcom_sram->base_phys + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return bcom_sram->base_virt + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) EXPORT_SYMBOL_GPL(bcom_sram_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void bcom_sram_free(void *ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned long offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (!ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) offset = ptr - bcom_sram->base_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) spin_lock(&bcom_sram->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) rh_free(bcom_sram->rh, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) spin_unlock(&bcom_sram->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) EXPORT_SYMBOL_GPL(bcom_sram_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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