Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Bestcomm FEC tasks driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2006-2007 Sylvain Munaut <tnt@246tNt.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2003-2004 MontaVista, Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *                         ( by Dale Farnsworth <dfarnsworth@mvista.com> )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * This file is licensed under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * version 2. This program is licensed "as is" without any warranty of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/fsl/bestcomm/bestcomm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/fsl/bestcomm/bestcomm_priv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/fsl/bestcomm/fec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /* ======================================================================== */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Task image/var/inc                                                       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* ======================================================================== */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /* fec tasks images */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) extern u32 bcom_fec_rx_task[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) extern u32 bcom_fec_tx_task[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* rx task vars that need to be set before enabling the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) struct bcom_fec_rx_var {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	u32 enable;		/* (u16*) address of task's control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	u32 fifo;		/* (u32*) address of fec's fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32 bd_base;		/* (struct bcom_bd*) beginning of ring buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32 bd_last;		/* (struct bcom_bd*) end of ring buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u32 bd_start;		/* (struct bcom_bd*) current bd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	u32 buffer_size;	/* size of receive buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /* rx task incs that need to be set before enabling the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) struct bcom_fec_rx_inc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	u16 pad0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	s16 incr_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	u16 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	s16 incr_dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u16 pad2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	s16 incr_dst_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) /* tx task vars that need to be set before enabling the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) struct bcom_fec_tx_var {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u32 DRD;		/* (u32*) address of self-modified DRD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 fifo;		/* (u32*) address of fec's fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u32 enable;		/* (u16*) address of task's control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u32 bd_base;		/* (struct bcom_bd*) beginning of ring buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32 bd_last;		/* (struct bcom_bd*) end of ring buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u32 bd_start;		/* (struct bcom_bd*) current bd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	u32 buffer_size;	/* set by uCode for each packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) /* tx task incs that need to be set before enabling the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct bcom_fec_tx_inc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u16 pad0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	s16 incr_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u16 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	s16 incr_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	u16 pad2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	s16 incr_src_ma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) /* private structure in the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) struct bcom_fec_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	phys_addr_t	fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int		maxbufsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) /* ======================================================================== */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) /* Task support code                                                        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) /* ======================================================================== */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) struct bcom_task *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) bcom_fec_rx_init(int queue_len, phys_addr_t fifo, int maxbufsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct bcom_task *tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct bcom_fec_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_fec_bd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 				sizeof(struct bcom_fec_priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (!tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	tsk->flags = BCOM_FLAGS_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	priv = tsk->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	priv->fifo = fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	priv->maxbufsize = maxbufsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (bcom_fec_rx_reset(tsk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		bcom_task_free(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	return tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) EXPORT_SYMBOL_GPL(bcom_fec_rx_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) bcom_fec_rx_reset(struct bcom_task *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct bcom_fec_priv *priv = tsk->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	struct bcom_fec_rx_var *var;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct bcom_fec_rx_inc *inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/* Shutdown the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	bcom_disable_task(tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	/* Reset the microcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	var = (struct bcom_fec_rx_var *) bcom_task_var(tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	inc = (struct bcom_fec_rx_inc *) bcom_task_inc(tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	if (bcom_load_image(tsk->tasknum, bcom_fec_rx_task))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	var->enable	= bcom_eng->regs_base +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	var->fifo	= (u32) priv->fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	var->bd_base	= tsk->bd_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	var->bd_last	= tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	var->bd_start	= tsk->bd_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	var->buffer_size = priv->maxbufsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	inc->incr_bytes	= -(s16)sizeof(u32);	/* These should be in the   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	inc->incr_dst	= sizeof(u32);		/* task image, but we stick */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	inc->incr_dst_ma= sizeof(u8);		/* to the official ones     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	/* Reset the BDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	tsk->index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	tsk->outdex = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	/* Configure some stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	bcom_set_task_pragma(tsk->tasknum, BCOM_FEC_RX_BD_PRAGMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_FEC_RX], BCOM_IPR_FEC_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum);	/* Clear ints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) EXPORT_SYMBOL_GPL(bcom_fec_rx_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) bcom_fec_rx_release(struct bcom_task *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	/* Nothing special for the FEC tasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	bcom_task_free(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) EXPORT_SYMBOL_GPL(bcom_fec_rx_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	/* Return 2nd to last DRD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/* This is an ugly hack, but at least it's only done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	   once at initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static u32 *self_modified_drd(int tasknum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	u32 *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	int num_descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	int drd_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	num_descs = bcom_task_num_descs(tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	desc = bcom_task_desc(tasknum) + num_descs - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	drd_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	for (i=0; i<num_descs; i++, desc--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		if (bcom_desc_is_drd(*desc) && ++drd_count == 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct bcom_task *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) bcom_fec_tx_init(int queue_len, phys_addr_t fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct bcom_task *tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct bcom_fec_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_fec_bd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 				sizeof(struct bcom_fec_priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (!tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	tsk->flags = BCOM_FLAGS_ENABLE_TASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	priv = tsk->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	priv->fifo = fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (bcom_fec_tx_reset(tsk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		bcom_task_free(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	return tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) EXPORT_SYMBOL_GPL(bcom_fec_tx_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) bcom_fec_tx_reset(struct bcom_task *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct bcom_fec_priv *priv = tsk->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct bcom_fec_tx_var *var;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct bcom_fec_tx_inc *inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	/* Shutdown the task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	bcom_disable_task(tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/* Reset the microcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	var = (struct bcom_fec_tx_var *) bcom_task_var(tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	inc = (struct bcom_fec_tx_inc *) bcom_task_inc(tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	if (bcom_load_image(tsk->tasknum, bcom_fec_tx_task))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	var->enable	= bcom_eng->regs_base +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	var->fifo	= (u32) priv->fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	var->DRD	= bcom_sram_va2pa(self_modified_drd(tsk->tasknum));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	var->bd_base	= tsk->bd_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	var->bd_last	= tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	var->bd_start	= tsk->bd_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	inc->incr_bytes	= -(s16)sizeof(u32);	/* These should be in the   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	inc->incr_src	= sizeof(u32);		/* task image, but we stick */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	inc->incr_src_ma= sizeof(u8);		/* to the official ones     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	/* Reset the BDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	tsk->index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	tsk->outdex = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	/* Configure some stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	bcom_set_task_pragma(tsk->tasknum, BCOM_FEC_TX_BD_PRAGMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_FEC_TX], BCOM_IPR_FEC_TX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum);	/* Clear ints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) EXPORT_SYMBOL_GPL(bcom_fec_tx_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) bcom_fec_tx_release(struct bcom_task *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	/* Nothing special for the FEC tasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	bcom_task_free(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) EXPORT_SYMBOL_GPL(bcom_fec_tx_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MODULE_DESCRIPTION("BestComm FEC tasks driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MODULE_AUTHOR("Dale Farnsworth <dfarnsworth@mvista.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)