Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Early setup for Rockchip DMA CMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2022 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Author: Simon Xue <xxm@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/cma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/dma-map-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "rk-dma-heap.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RK_DMA_HEAP_CMA_DEFAULT_SIZE SZ_32M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static unsigned long rk_dma_heap_size __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static unsigned long rk_dma_heap_base __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static struct cma *rk_dma_heap_cma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static int __init early_dma_heap_cma(char *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	if (!p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		pr_err("Config string not provided\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	rk_dma_heap_size = memparse(p, &p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	if (*p != '@')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	rk_dma_heap_base = memparse(p + 1, &p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) early_param("rk_dma_heap_cma", early_dma_heap_cma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #ifndef CONFIG_DMA_CMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void __weak
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int __init rk_dma_heap_cma_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	unsigned long size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	bool fix = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	if (rk_dma_heap_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		size = rk_dma_heap_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		size = RK_DMA_HEAP_CMA_DEFAULT_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	if (rk_dma_heap_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		fix = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	ret = cma_declare_contiguous(rk_dma_heap_base, PAGE_ALIGN(size), 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 				     PAGE_SIZE, 0, fix, "rk-dma-heap-cma",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 				     &rk_dma_heap_cma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #if !IS_ENABLED(CONFIG_CMA_INACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	/* Architecture specific contiguous memory fixup. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	dma_contiguous_early_fixup(cma_get_base(rk_dma_heap_cma),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	cma_get_size(rk_dma_heap_cma));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct cma *rk_dma_heap_get_cma(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	return rk_dma_heap_cma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }