^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * K3 SA2UL crypto accelerator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Authors: Keerthy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Vitaly Andrianov
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Tero Kristo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef _K3_SA2UL_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define _K3_SA2UL_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <crypto/aes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SA_ENGINE_ENABLE_CONTROL 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct sa_tfm_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * SA_ENGINE_ENABLE_CONTROL register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SA_EEC_ENCSS_EN 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SA_EEC_AUTHSS_EN 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SA_EEC_TRNG_EN 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SA_EEC_PKA_EN 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SA_EEC_CTXCACH_EN 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SA_EEC_CPPI_PORT_IN_EN 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SA_EEC_CPPI_PORT_OUT_EN 0x00000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Encoding used to identify the typo of crypto operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * performed on the packet when the packet is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * by SA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SA_REQ_SUBTYPE_ENC 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SA_REQ_SUBTYPE_DEC 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SA_REQ_SUBTYPE_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SA_REQ_SUBTYPE_MASK 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Number of 32 bit words in EPIB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SA_DMA_NUM_EPIB_WORDS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Number of 32 bit words in PS data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define SA_DMA_NUM_PS_WORDS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define NKEY_SZ 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MCI_SZ 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Maximum number of simultaeneous security contexts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * supported by the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define SA_MAX_NUM_CTX 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Assumption: CTX size is multiple of 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define SA_CTX_SIZE_TO_DMA_SIZE(ctx_sz) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define SA_CTX_ENC_KEY_OFFSET 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define SA_CTX_ENC_AUX1_OFFSET 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define SA_CTX_ENC_AUX2_OFFSET 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define SA_CTX_ENC_AUX3_OFFSET 112
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define SA_CTX_ENC_AUX4_OFFSET 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Next Engine Select code in CP_ACE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SA_ENG_ID_EM1 2 /* Enc/Dec engine with AES/DEC core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SA_ENG_ID_EM2 3 /* Encryption/Decryption enginefor pass 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define SA_ENG_ID_AM1 4 /* Auth. engine with SHA1/MD5/SHA2 core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define SA_ENG_ID_AM2 5 /* Authentication engine for pass 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define SA_ENG_ID_OUTPORT2 20 /* Egress module 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * Command Label Definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define SA_CMDL_OFFSET_NESC 0 /* Next Engine Select Code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define SA_CMDL_OFFSET_LABEL_LEN 1 /* Engine Command Label Length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* 16-bit Length of Data to be processed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SA_CMDL_OFFSET_DATA_LEN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define SA_CMDL_OFFSET_DATA_OFFSET 4 /* Stat Data Offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define SA_CMDL_OFFSET_OPTION_CTRL1 5 /* Option Control Byte 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define SA_CMDL_OFFSET_OPTION_CTRL2 6 /* Option Control Byte 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SA_CMDL_OFFSET_OPTION_CTRL3 7 /* Option Control Byte 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define SA_CMDL_OFFSET_OPTION_BYTE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define SA_CMDL_HEADER_SIZE_BYTES 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define SA_CMDL_OPTION_BYTES_MAX_SIZE 72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define SA_CMDL_MAX_SIZE_BYTES (SA_CMDL_HEADER_SIZE_BYTES + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) SA_CMDL_OPTION_BYTES_MAX_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* SWINFO word-0 flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define SA_SW_INFO_FLAG_EVICT 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define SA_SW_INFO_FLAG_TEAR 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define SA_SW_INFO_FLAG_NOPD 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * This type represents the various packet types to be processed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * by the PHP engine in SA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * It is used to identify the corresponding PHP processing function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define SA_CTX_PE_PKT_TYPE_3GPP_AIR 0 /* 3GPP Air Cipher */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define SA_CTX_PE_PKT_TYPE_SRTP 1 /* SRTP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define SA_CTX_PE_PKT_TYPE_IPSEC_AH 2 /* IPSec Authentication Header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* IPSec Encapsulating Security Payload */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define SA_CTX_PE_PKT_TYPE_IPSEC_ESP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* Indicates that it is in data mode, It may not be used by PHP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define SA_CTX_PE_PKT_TYPE_NONE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define SA_CTX_ENC_TYPE1_SZ 64 /* Encryption SC with Key only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define SA_CTX_ENC_TYPE2_SZ 96 /* Encryption SC with Key and Aux1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define SA_CTX_AUTH_TYPE1_SZ 64 /* Auth SC with Key only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define SA_CTX_AUTH_TYPE2_SZ 96 /* Auth SC with Key and Aux1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Size of security context for PHP engine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define SA_CTX_PHP_PE_CTX_SZ 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define SA_CTX_MAX_SZ (64 + SA_CTX_ENC_TYPE2_SZ + SA_CTX_AUTH_TYPE2_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * Encoding of F/E control in SCCTL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * Bit 0-1: Fetch PHP Bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * Bit 2-3: Fetch Encryption/Air Ciphering Bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * Bit 4-5: Fetch Authentication Bytes or Encr pass 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * Bit 6-7: Evict PHP Bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * where 00 = 0 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * 01 = 64 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * 10 = 96 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * 11 = 128 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define SA_CTX_DMA_SIZE_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define SA_CTX_DMA_SIZE_64 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define SA_CTX_DMA_SIZE_96 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define SA_CTX_DMA_SIZE_128 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Byte offset of the owner word in SCCTL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * in the security context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define SA_CTX_SCCTL_OWNER_OFFSET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define SA_CTX_ENC_KEY_OFFSET 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define SA_CTX_ENC_AUX1_OFFSET 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define SA_CTX_ENC_AUX2_OFFSET 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define SA_CTX_ENC_AUX3_OFFSET 112
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define SA_CTX_ENC_AUX4_OFFSET 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define SA_SCCTL_FE_AUTH_ENC 0x65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define SA_SCCTL_FE_ENC 0x8D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define SA_ALIGN_MASK (sizeof(u32) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define SA_ALIGNED __aligned(32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define SA_AUTH_SW_CTRL_MD5 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define SA_AUTH_SW_CTRL_SHA1 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define SA_AUTH_SW_CTRL_SHA224 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define SA_AUTH_SW_CTRL_SHA256 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define SA_AUTH_SW_CTRL_SHA384 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define SA_AUTH_SW_CTRL_SHA512 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* SA2UL can only handle maximum data size of 64KB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define SA_MAX_DATA_SZ U16_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * SA2UL can provide unpredictable results with packet sizes that fall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * the following range, so avoid using it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define SA_UNSAFE_DATA_SZ_MIN 240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define SA_UNSAFE_DATA_SZ_MAX 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * struct sa_crypto_data - Crypto driver instance data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * @base: Base address of the register space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * @pdev: Platform device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * @sc_pool: security context pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * @dev: Device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * @scid_lock: secure context ID lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * @sc_id_start: starting index for SC ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @sc_id_end: Ending index for SC ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @sc_id: Security Context ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * @ctx_bm: Bitmap to keep track of Security context ID's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * @ctx: SA tfm context pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * @dma_rx1: Pointer to DMA rx channel for sizes < 256 Bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * @dma_rx2: Pointer to DMA rx channel for sizes > 256 Bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * @dma_tx: Pointer to DMA TX channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct sa_crypto_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct dma_pool *sc_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) spinlock_t scid_lock; /* lock for SC-ID allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* Security context data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u16 sc_id_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) u16 sc_id_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) u16 sc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) unsigned long ctx_bm[DIV_ROUND_UP(SA_MAX_NUM_CTX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) BITS_PER_LONG)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct sa_tfm_ctx *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct dma_chan *dma_rx1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct dma_chan *dma_rx2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct dma_chan *dma_tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * struct sa_cmdl_param_info: Command label parameters info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * @index: Index of the parameter in the command label format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * @offset: the offset of the parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * @size: Size of the parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct sa_cmdl_param_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u16 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u16 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Maximum length of Auxiliary data in 32bit words */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define SA_MAX_AUX_DATA_WORDS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * struct sa_cmdl_upd_info: Command label updation info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * @flags: flags in command label
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * @submode: Encryption submodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * @enc_size: Size of first pass encryption size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * @enc_size2: Size of second pass encryption size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * @enc_offset: Encryption payload offset in the packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * @enc_iv: Encryption initialization vector for pass2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * @enc_iv2: Encryption initialization vector for pass2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * @aad: Associated data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @payload: Payload info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @auth_size: Authentication size for pass 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * @auth_size2: Authentication size for pass 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * @auth_offset: Authentication payload offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * @auth_iv: Authentication initialization vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * @aux_key_info: Authentication aux key information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * @aux_key: Aux key for authentication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct sa_cmdl_upd_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u16 submode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct sa_cmdl_param_info enc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct sa_cmdl_param_info enc_size2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct sa_cmdl_param_info enc_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct sa_cmdl_param_info enc_iv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct sa_cmdl_param_info enc_iv2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct sa_cmdl_param_info aad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct sa_cmdl_param_info payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct sa_cmdl_param_info auth_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct sa_cmdl_param_info auth_size2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct sa_cmdl_param_info auth_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct sa_cmdl_param_info auth_iv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct sa_cmdl_param_info aux_key_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u32 aux_key[SA_MAX_AUX_DATA_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * Number of 32bit words appended after the command label
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * in PSDATA to identify the crypto request context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * word-0: Request type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * word-1: pointer to request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define SA_PSDATA_CTX_WORDS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* Maximum size of Command label in 32 words */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * struct sa_ctx_info: SA context information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * @sc: Pointer to security context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * @sc_phys: Security context physical address that is passed on to SA2UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * @sc_id: Security context ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * @cmdl_size: Command label size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * @cmdl: Command label for a particular iteration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * @cmdl_upd_info: structure holding command label updation info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * @epib: Extended protocol information block words
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct sa_ctx_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) u8 *sc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) dma_addr_t sc_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u16 sc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u16 cmdl_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u32 cmdl[SA_MAX_CMDL_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct sa_cmdl_upd_info cmdl_upd_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u32 epib[SA_DMA_NUM_EPIB_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * struct sa_tfm_ctx: TFM context structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * @dev_data: struct sa_crypto_data pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * @enc: struct sa_ctx_info for encryption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * @dec: struct sa_ctx_info for decryption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * @keylen: encrption/decryption keylength
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * @iv_idx: Initialization vector index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * @key: encryption key
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * @fallback: SW fallback algorithm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct sa_tfm_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct sa_crypto_data *dev_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct sa_ctx_info enc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct sa_ctx_info dec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct sa_ctx_info auth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) int keylen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int iv_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u32 key[AES_KEYSIZE_256 / sizeof(u32)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u8 authkey[SHA512_BLOCK_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct crypto_shash *shash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /* for fallback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct crypto_sync_skcipher *skcipher;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct crypto_ahash *ahash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct crypto_aead *aead;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) } fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * struct sa_sha_req_ctx: Structure used for sha request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * @dev_data: struct sa_crypto_data pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * @cmdl: Complete command label with psdata and epib included
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * @fallback_req: SW fallback request container
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct sa_sha_req_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct sa_crypto_data *dev_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u32 cmdl[SA_MAX_CMDL_WORDS + SA_PSDATA_CTX_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct ahash_request fallback_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) enum sa_submode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) SA_MODE_GEN = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) SA_MODE_CCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) SA_MODE_GCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) SA_MODE_GMAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* Encryption algorithms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) enum sa_ealg_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) SA_EALG_ID_NONE = 0, /* No encryption */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) SA_EALG_ID_NULL, /* NULL encryption */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) SA_EALG_ID_AES_CTR, /* AES Counter mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) SA_EALG_ID_AES_F8, /* AES F8 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) SA_EALG_ID_AES_CBC, /* AES CBC mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) SA_EALG_ID_DES_CBC, /* DES CBC mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) SA_EALG_ID_3DES_CBC, /* 3DES CBC mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) SA_EALG_ID_CCM, /* Counter with CBC-MAC mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) SA_EALG_ID_GCM, /* Galois Counter mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) SA_EALG_ID_AES_ECB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) SA_EALG_ID_LAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* Authentication algorithms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) enum sa_aalg_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) SA_AALG_ID_NONE = 0, /* No Authentication */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) SA_AALG_ID_NULL = SA_EALG_ID_LAST, /* NULL Authentication */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) SA_AALG_ID_MD5, /* MD5 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) SA_AALG_ID_SHA1, /* SHA1 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) SA_AALG_ID_SHA2_224, /* 224-bit SHA2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) SA_AALG_ID_SHA2_256, /* 256-bit SHA2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) SA_AALG_ID_SHA2_512, /* 512-bit SHA2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) SA_AALG_ID_HMAC_MD5, /* HMAC with MD5 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) SA_AALG_ID_HMAC_SHA1, /* HMAC with SHA1 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) SA_AALG_ID_GMAC, /* Galois Message Auth. Code mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) SA_AALG_ID_CMAC, /* Cipher-based Mes. Auth. Code mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) SA_AALG_ID_CBC_MAC, /* Cipher Block Chaining */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) SA_AALG_ID_AES_XCBC /* AES Extended Cipher Block Chaining */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * Mode control engine algorithms used to index the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * mode control instruction tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) enum sa_eng_algo_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) SA_ENG_ALGO_ECB = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) SA_ENG_ALGO_CBC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) SA_ENG_ALGO_CFB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SA_ENG_ALGO_OFB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) SA_ENG_ALGO_CTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) SA_ENG_ALGO_F8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SA_ENG_ALGO_F8F9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) SA_ENG_ALGO_GCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) SA_ENG_ALGO_GMAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) SA_ENG_ALGO_CCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) SA_ENG_ALGO_CMAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) SA_ENG_ALGO_CBCMAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SA_NUM_ENG_ALGOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * struct sa_eng_info: Security accelerator engine info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * @eng_id: Engine ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * @sc_size: security context size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct sa_eng_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u8 eng_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) u16 sc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #endif /* _K3_SA2UL_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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