^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Cryptographic API.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for OMAP AES HW ACCELERATOR defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2015 Texas Instruments Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __OMAP_AES_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __OMAP_AES_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <crypto/aes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <crypto/engine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define DST_MAXBURST 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define DMA_MIN (DST_MAXBURST * sizeof(u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * OMAP TRM gives bitfields as start:end, where start is the higher bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * number. For example 7:0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) (((x) ^ 0x01) * 0x04))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define AES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AES_REG_CTRL_CONTEXT_READY BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define AES_REG_CTRL_CTR_WIDTH_MASK GENMASK(8, 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define AES_REG_CTRL_CTR_WIDTH_32 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AES_REG_CTRL_CTR_WIDTH_64 BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define AES_REG_CTRL_CTR_WIDTH_96 BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define AES_REG_CTRL_CTR_WIDTH_128 GENMASK(8, 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define AES_REG_CTRL_GCM GENMASK(17, 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define AES_REG_CTRL_CTR BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define AES_REG_CTRL_CBC BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define AES_REG_CTRL_KEY_SIZE GENMASK(4, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define AES_REG_CTRL_DIRECTION BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define AES_REG_CTRL_INPUT_READY BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define AES_REG_CTRL_OUTPUT_READY BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define AES_REG_CTRL_MASK GENMASK(24, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define AES_REG_C_LEN_0 0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define AES_REG_C_LEN_1 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define AES_REG_A_LEN 0x5C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define AES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define AES_REG_TAG_N(dd, x) (0x70 + ((x) * 0x04))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define AES_REG_REV(dd) ((dd)->pdata->rev_ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define AES_REG_MASK(dd) ((dd)->pdata->mask_ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define AES_REG_MASK_SIDLE BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define AES_REG_MASK_START BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define AES_REG_MASK_DMA_OUT_EN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define AES_REG_MASK_DMA_IN_EN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define AES_REG_MASK_SOFTRESET BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define AES_REG_AUTOIDLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define AES_REG_LENGTH_N(x) (0x54 + ((x) * 0x04))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define AES_REG_IRQ_STATUS(dd) ((dd)->pdata->irq_status_ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define AES_REG_IRQ_ENABLE(dd) ((dd)->pdata->irq_enable_ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define AES_REG_IRQ_DATA_IN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define AES_REG_IRQ_DATA_OUT BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DEFAULT_TIMEOUT (5 * HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define DEFAULT_AUTOSUSPEND_DELAY 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define FLAGS_MODE_MASK 0x001f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define FLAGS_ENCRYPT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define FLAGS_CBC BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define FLAGS_CTR BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define FLAGS_GCM BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define FLAGS_RFC4106_GCM BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define FLAGS_INIT BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define FLAGS_FAST BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define FLAGS_IN_DATA_ST_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define FLAGS_OUT_DATA_ST_SHIFT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define FLAGS_ASSOC_DATA_ST_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define AES_BLOCK_WORDS (AES_BLOCK_SIZE >> 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct omap_aes_gcm_result {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct completion completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct omap_aes_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct crypto_engine_ctx enginectx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int keylen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u32 key[AES_KEYSIZE_256 / sizeof(u32)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 nonce[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct crypto_skcipher *fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct omap_aes_gcm_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct omap_aes_ctx octx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct crypto_aes_ctx actx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct omap_aes_reqctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct omap_aes_dev *dd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned long mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u8 iv[AES_BLOCK_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 auth_tag[AES_BLOCK_SIZE / sizeof(u32)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct skcipher_request fallback_req; // keep at the end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define OMAP_AES_QUEUE_LENGTH 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define OMAP_AES_CACHE_SIZE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct omap_aes_algs_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct skcipher_alg *algs_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned int registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct omap_aes_aead_algs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct aead_alg *algs_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct omap_aes_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct omap_aes_algs_info *algs_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned int algs_info_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct omap_aes_aead_algs *aead_algs_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) void (*trigger)(struct omap_aes_dev *dd, int length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u32 key_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) u32 iv_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u32 ctrl_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u32 data_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u32 rev_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u32 mask_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u32 irq_enable_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u32 irq_status_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u32 dma_enable_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u32 dma_enable_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u32 dma_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u32 major_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) u32 major_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u32 minor_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u32 minor_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct omap_aes_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned long phys_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) void __iomem *io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct omap_aes_ctx *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct tasklet_struct done_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct aead_queue aead_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct skcipher_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct aead_request *aead_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct crypto_engine *engine;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * total is used by PIO mode for book keeping so introduce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * variable total_save as need it to calc page_order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) size_t total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) size_t total_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) size_t assoc_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) size_t authsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct scatterlist *in_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct scatterlist *out_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* Buffers for copying for unaligned cases */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct scatterlist in_sgl[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct scatterlist out_sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct scatterlist *orig_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct scatter_walk in_walk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct scatter_walk out_walk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct dma_chan *dma_lch_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct dma_chan *dma_lch_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int in_sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int out_sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int pio_only;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) const struct omap_aes_pdata *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) u32 omap_aes_read(struct omap_aes_dev *dd, u32 offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) void omap_aes_write(struct omap_aes_dev *dd, u32 offset, u32 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct omap_aes_dev *omap_aes_find_dev(struct omap_aes_reqctx *rctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int omap_aes_gcm_setkey(struct crypto_aead *tfm, const u8 *key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) unsigned int keylen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int omap_aes_4106gcm_setkey(struct crypto_aead *tfm, const u8 *key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) unsigned int keylen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int omap_aes_gcm_encrypt(struct aead_request *req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int omap_aes_gcm_decrypt(struct aead_request *req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int omap_aes_gcm_setauthsize(struct crypto_aead *tfm, unsigned int authsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int omap_aes_4106gcm_encrypt(struct aead_request *req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int omap_aes_4106gcm_decrypt(struct aead_request *req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int omap_aes_4106gcm_setauthsize(struct crypto_aead *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) unsigned int authsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int omap_aes_gcm_cra_init(struct crypto_aead *tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int omap_aes_write_ctrl(struct omap_aes_dev *dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) int omap_aes_crypt_dma_start(struct omap_aes_dev *dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) void omap_aes_gcm_dma_out_callback(void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) void omap_aes_clear_copy_flags(struct omap_aes_dev *dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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