^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AES XCBC routines supporting the Power 7+ Nest Accelerators driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011-2012 International Business Machines Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Kent Yoder <yoder1@us.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <crypto/internal/hash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <crypto/aes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <crypto/algapi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/crypto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/vio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "nx_csbcpb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "nx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct xcbc_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u8 state[AES_BLOCK_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u8 buffer[AES_BLOCK_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int nx_xcbc_set_key(struct crypto_shash *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) const u8 *in_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned int key_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) switch (key_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) case AES_KEYSIZE_128:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) memcpy(csbcpb->cpb.aes_xcbc.key, in_key, key_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Based on RFC 3566, for a zero-length message:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * n = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * K1 = E(K, 0x01010101010101010101010101010101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * K3 = E(K, 0x03030303030303030303030303030303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * E[0] = 0x00000000000000000000000000000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * M[1] = 0x80000000000000000000000000000000 (0 length message with padding)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * E[1] = (K1, M[1] ^ E[0] ^ K3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Tag = M[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int nx_xcbc_empty(struct shash_desc *desc, u8 *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct nx_sg *in_sg, *out_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u8 keys[2][AES_BLOCK_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u8 key[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Change to ECB mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) csbcpb->cpb.hdr.mode = NX_MODE_AES_ECB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) memcpy(key, csbcpb->cpb.aes_xcbc.key, AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) memcpy(csbcpb->cpb.aes_ecb.key, key, AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* K1 and K3 base patterns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) memset(keys[0], 0x01, sizeof(keys[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) memset(keys[1], 0x03, sizeof(keys[1]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) len = sizeof(keys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Generate K1 and K3 encrypting the patterns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *) keys, &len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (len != sizeof(keys))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *) keys, &len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (len != sizeof(keys))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) atomic_inc(&(nx_ctx->stats->aes_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* XOr K3 with the padding for a 0 length message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) keys[1][0] ^= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) len = sizeof(keys[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Encrypt the final result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) memcpy(csbcpb->cpb.aes_ecb.key, keys[0], AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *) keys[1], &len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (len != sizeof(keys[1]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) len = AES_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) out_sg = nx_build_sg_list(nx_ctx->out_sg, out, &len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (len != AES_BLOCK_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) atomic_inc(&(nx_ctx->stats->aes_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Restore XCBC mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) csbcpb->cpb.hdr.mode = NX_MODE_AES_XCBC_MAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) memcpy(csbcpb->cpb.aes_xcbc.key, key, AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int nx_crypto_ctx_aes_xcbc_init2(struct crypto_tfm *tfm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) err = nx_crypto_ctx_aes_xcbc_init(tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) nx_ctx_init(nx_ctx, HCOP_FC_AES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) csbcpb->cpb.hdr.mode = NX_MODE_AES_XCBC_MAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int nx_xcbc_init(struct shash_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct xcbc_state *sctx = shash_desc_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) memset(sctx, 0, sizeof *sctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static int nx_xcbc_update(struct shash_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) const u8 *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct xcbc_state *sctx = shash_desc_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct nx_sg *in_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct nx_sg *out_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) u32 to_process = 0, leftover, total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) unsigned int max_sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned long irq_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) spin_lock_irqsave(&nx_ctx->lock, irq_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) total = sctx->count + len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* 2 cases for total data len:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * 1: <= AES_BLOCK_SIZE: copy into state, return 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * 2: > AES_BLOCK_SIZE: process X blocks, copy in leftover
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (total <= AES_BLOCK_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) memcpy(sctx->buffer + sctx->count, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) sctx->count += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) in_sg = nx_ctx->in_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) max_sg_len = min_t(u64, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) max_sg_len = min_t(u64, max_sg_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) nx_ctx->ap->databytelen/NX_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) data_len = AES_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *)sctx->state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) &len, nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (data_len != AES_BLOCK_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) to_process = total - to_process;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) to_process = to_process & ~(AES_BLOCK_SIZE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) leftover = total - to_process;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* the hardware will not accept a 0 byte operation for this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * algorithm and the operation MUST be finalized to be correct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * So if we happen to get an update that falls on a block sized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * boundary, we must save off the last block to finalize with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (!leftover) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) to_process -= AES_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) leftover = AES_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (sctx->count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) data_len = sctx->count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) in_sg = nx_build_sg_list(nx_ctx->in_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) (u8 *) sctx->buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) &data_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) max_sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (data_len != sctx->count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) data_len = to_process - sctx->count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) in_sg = nx_build_sg_list(in_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) (u8 *) data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) &data_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) max_sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (data_len != to_process - sctx->count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* we've hit the nx chip previously and we're updating again,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * so copy over the partial digest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (NX_CPB_FDM(csbcpb) & NX_FDM_CONTINUATION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) memcpy(csbcpb->cpb.aes_xcbc.cv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) csbcpb->cpb.aes_xcbc.out_cv_mac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) atomic_inc(&(nx_ctx->stats->aes_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* everything after the first update is continuation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) total -= to_process;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) data += to_process - sctx->count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) sctx->count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) in_sg = nx_ctx->in_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) } while (leftover > AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* copy the leftover back into the state struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) memcpy(sctx->buffer, data, leftover);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) sctx->count = leftover;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int nx_xcbc_final(struct shash_desc *desc, u8 *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct xcbc_state *sctx = shash_desc_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct nx_sg *in_sg, *out_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) unsigned long irq_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) spin_lock_irqsave(&nx_ctx->lock, irq_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (NX_CPB_FDM(csbcpb) & NX_FDM_CONTINUATION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* we've hit the nx chip previously, now we're finalizing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * so copy over the partial digest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) memcpy(csbcpb->cpb.aes_xcbc.cv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) csbcpb->cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) } else if (sctx->count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * we've never seen an update, so this is a 0 byte op. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * hardware cannot handle a 0 byte op, so just ECB to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * generate the hash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) rc = nx_xcbc_empty(desc, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* final is represented by continuing the operation and indicating that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * this is not an intermediate operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) len = sctx->count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *)sctx->buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) &len, nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (len != sctx->count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) len = AES_BLOCK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) out_sg = nx_build_sg_list(nx_ctx->out_sg, out, &len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) nx_ctx->ap->sglen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (len != AES_BLOCK_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (!nx_ctx->op.outlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) atomic_inc(&(nx_ctx->stats->aes_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) memcpy(out, csbcpb->cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct shash_alg nx_shash_aes_xcbc_alg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .digestsize = AES_BLOCK_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .init = nx_xcbc_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .update = nx_xcbc_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .final = nx_xcbc_final,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .setkey = nx_xcbc_set_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .descsize = sizeof(struct xcbc_state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .statesize = sizeof(struct xcbc_state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .base = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .cra_name = "xcbc(aes)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .cra_driver_name = "xcbc-aes-nx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .cra_priority = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .cra_blocksize = AES_BLOCK_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .cra_module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .cra_ctxsize = sizeof(struct nx_crypto_ctx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .cra_init = nx_crypto_ctx_aes_xcbc_init2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .cra_exit = nx_crypto_ctx_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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