^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef __NX_842_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define __NX_842_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/crypto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/ratelimit.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Restrictions on Data Descriptor List (DDL) and Entry (DDE) buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * From NX P8 workbook, sec 4.9.1 "842 details"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Each DDE buffer is 128 byte aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Each DDE buffer size is a multiple of 32 bytes (except the last)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * The last DDE buffer size is a multiple of 8 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DDE_BUFFER_ALIGN (128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DDE_BUFFER_SIZE_MULT (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DDE_BUFFER_LAST_MULT (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* Arbitrary DDL length limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * Allows max buffer size of MAX-1 to MAX pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * (depending on alignment)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DDL_LEN_MAX (17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* CCW 842 CI/FC masks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * NX P8 workbook, section 4.3.1, figure 4-6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * "CI/FC Boundary by NX CT type"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define CCW_CI_842 (0x00003ff8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define CCW_FC_842 (0x00000007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* CCW Function Codes (FC) for 842
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * NX P8 workbook, section 4.9, table 4-28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * "Function Code Definitions for 842 Memory Compression"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define CCW_FC_842_COMP_NOCRC (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define CCW_FC_842_COMP_CRC (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define CCW_FC_842_DECOMP_NOCRC (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CCW_FC_842_DECOMP_CRC (3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CCW_FC_842_MOVE (4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* CSB CC Error Types for 842
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * NX P8 workbook, section 4.10.3, table 4-30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * "Reported Error Types Summary Table"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* These are all duplicates of existing codes defined in icswx.h. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define CSB_CC_TRANSLATION_DUP1 (80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CSB_CC_TRANSLATION_DUP2 (82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CSB_CC_TRANSLATION_DUP3 (84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CSB_CC_TRANSLATION_DUP4 (86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define CSB_CC_TRANSLATION_DUP5 (92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define CSB_CC_TRANSLATION_DUP6 (94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define CSB_CC_PROTECTION_DUP1 (81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define CSB_CC_PROTECTION_DUP2 (83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define CSB_CC_PROTECTION_DUP3 (85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define CSB_CC_PROTECTION_DUP4 (87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define CSB_CC_PROTECTION_DUP5 (93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define CSB_CC_PROTECTION_DUP6 (95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define CSB_CC_RD_EXTERNAL_DUP1 (89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define CSB_CC_RD_EXTERNAL_DUP2 (90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define CSB_CC_RD_EXTERNAL_DUP3 (91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* These are specific to NX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* 842 codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define CSB_CC_TPBC_GT_SPBC (64) /* no error, but >1 comp ratio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define CSB_CC_CRC_MISMATCH (65) /* decomp crc mismatch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define CSB_CC_TEMPL_INVALID (66) /* decomp invalid template value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define CSB_CC_TEMPL_OVERFLOW (67) /* decomp template shows data after end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* sym crypt codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define CSB_CC_DECRYPT_OVERFLOW (64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* asym crypt codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define CSB_CC_MINV_OVERFLOW (128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * HW error - Job did not finish in the maximum time allowed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * Job terminated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define CSB_CC_HW_EXPIRED_TIMER (224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* These are reserved for hypervisor use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define CSB_CC_HYP_RESERVE_START (240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define CSB_CC_HYP_RESERVE_END (253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define CSB_CC_HYP_RESERVE_P9_END (251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* No valid interrupt server (P9 or later). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define CSB_CC_HYP_RESERVE_NO_INTR_SERVER (252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define CSB_CC_HYP_NO_HW (254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define CSB_CC_HYP_HANG_ABORTED (255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* CCB Completion Modes (CM) for 842
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * NX P8 workbook, section 4.3, figure 4-5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * "CRB Details - Normal Cop_Req (CL=00, C=1)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define CCB_CM_EXTRA_WRITE (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_STORE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define CCB_CM_INTERRUPT (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define LEN_ON_SIZE(pa, size) ((size) - ((pa) & ((size) - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define LEN_ON_PAGE(pa) LEN_ON_SIZE(pa, PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static inline unsigned long nx842_get_pa(void *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (!is_vmalloc_addr(addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return __pa(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * This provides the driver's constraints. Different nx842 implementations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * may have varying requirements. The constraints are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * @alignment: All buffers should be aligned to this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * @multiple: All buffer lengths should be a multiple of this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @minimum: Buffer lengths must not be less than this amount
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @maximum: Buffer lengths must not be more than this amount
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * The constraints apply to all buffers and lengths, both input and output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * for both compression and decompression, except for the minimum which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * only applies to compression input and decompression output; the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * compressed data can be less than the minimum constraint. It can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * assumed that compressed data will always adhere to the multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * constraint.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * The driver may succeed even if these constraints are violated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * however the driver can return failure or suffer reduced performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * if any constraint is not met.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct nx842_constraints {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int alignment;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int multiple;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int minimum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int maximum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct nx842_driver {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct module *owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) size_t workmem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct nx842_constraints *constraints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int (*compress)(const unsigned char *in, unsigned int in_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned char *out, unsigned int *out_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) void *wrkmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int (*decompress)(const unsigned char *in, unsigned int in_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned char *out, unsigned int *out_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) void *wrkmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct nx842_crypto_header_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) __be16 padding; /* unused bytes at start of group */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) __be32 compressed_length; /* compressed bytes in group */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) __be32 uncompressed_length; /* bytes after decompression */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct nx842_crypto_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) __be16 magic; /* NX842_CRYPTO_MAGIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) __be16 ignore; /* decompressed end bytes to ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u8 groups; /* total groups in this header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct nx842_crypto_header_group group[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define NX842_CRYPTO_GROUP_MAX (0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct nx842_crypto_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) u8 *wmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) u8 *sbounce, *dbounce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct nx842_crypto_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct nx842_crypto_header_group group[NX842_CRYPTO_GROUP_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct nx842_driver *driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int nx842_crypto_init(struct crypto_tfm *tfm, struct nx842_driver *driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) void nx842_crypto_exit(struct crypto_tfm *tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int nx842_crypto_compress(struct crypto_tfm *tfm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) const u8 *src, unsigned int slen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) u8 *dst, unsigned int *dlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int nx842_crypto_decompress(struct crypto_tfm *tfm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) const u8 *src, unsigned int slen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) u8 *dst, unsigned int *dlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #endif /* __NX_842_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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