Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Driver for EIP97 cryptographic accelerator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef __MTK_PLATFORM_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define __MTK_PLATFORM_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <crypto/algapi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <crypto/internal/aead.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <crypto/internal/hash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <crypto/scatterwalk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <crypto/skcipher.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/crypto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/scatterlist.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "mtk-regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define MTK_RDR_PROC_THRESH	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define MTK_RDR_PROC_MODE	BIT(23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MTK_CNT_RST		BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define MTK_IRQ_RDR0		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MTK_IRQ_RDR1		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MTK_IRQ_RDR2		BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define MTK_IRQ_RDR3		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define SIZE_IN_WORDS(x)	((x) >> 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * Ring 0/1 are used by AES encrypt and decrypt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * Ring 2/3 are used by SHA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	MTK_RING0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	MTK_RING1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	MTK_RING2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	MTK_RING3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	MTK_RING_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define MTK_REC_NUM		(MTK_RING_MAX / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MTK_IRQ_NUM		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * struct mtk_desc - DMA descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * @hdr:	the descriptor control header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * @buf:	DMA address of input buffer segment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * @ct:		DMA address of command token that control operation flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * @ct_hdr:	the command token control header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * @tag:	the user-defined field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * @tfm:	DMA address of transform state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * @bound:	align descriptors offset boundary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * Structure passed to the crypto engine to describe where source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * data needs to be fetched and how it needs to be processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) struct mtk_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	__le32 hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	__le32 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	__le32 ct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	__le32 ct_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	__le32 tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	__le32 tfm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	__le32 bound[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define MTK_DESC_NUM		512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define MTK_DESC_OFF		SIZE_IN_WORDS(sizeof(struct mtk_desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define MTK_DESC_SZ		(MTK_DESC_OFF - 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define MTK_DESC_RING_SZ	((sizeof(struct mtk_desc) * MTK_DESC_NUM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define MTK_DESC_CNT(x)		((MTK_DESC_OFF * (x)) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define MTK_DESC_LAST		cpu_to_le32(BIT(22))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define MTK_DESC_FIRST		cpu_to_le32(BIT(23))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define MTK_DESC_BUF_LEN(x)	cpu_to_le32(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define MTK_DESC_CT_LEN(x)	cpu_to_le32((x) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * struct mtk_ring - Descriptor ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * @cmd_base:	pointer to command descriptor ring base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * @cmd_next:	pointer to the next command descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * @cmd_dma:	DMA address of command descriptor ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * @res_base:	pointer to result descriptor ring base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * @res_next:	pointer to the next result descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * @res_prev:	pointer to the previous result descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * @res_dma:	DMA address of result descriptor ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  * A descriptor ring is a circular buffer that is used to manage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * one or more descriptors. There are two type of descriptor rings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * the command descriptor ring and result descriptor ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) struct mtk_ring {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct mtk_desc *cmd_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct mtk_desc *cmd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	dma_addr_t cmd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct mtk_desc *res_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	struct mtk_desc *res_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	struct mtk_desc *res_prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	dma_addr_t res_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)  * struct mtk_aes_dma - Structure that holds sg list info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  * @sg:		pointer to scatter-gather list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  * @nents:	number of entries in the sg list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  * @remainder:	remainder of sg list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  * @sg_len:	number of entries in the sg mapped list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct mtk_aes_dma {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	int nents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	u32 remainder;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	u32 sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct mtk_aes_base_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mtk_aes_rec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct mtk_cryp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)  * struct mtk_aes_rec - AES operation record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)  * @cryp:	pointer to Cryptographic device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)  * @queue:	crypto request queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  * @areq:	pointer to async request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  * @done_task:	the tasklet is use in AES interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)  * @queue_task:	the tasklet is used to dequeue request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)  * @ctx:	pointer to current context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)  * @src:	the structure that holds source sg list info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)  * @dst:	the structure that holds destination sg list info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)  * @aligned_sg:	the scatter list is use to alignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)  * @real_dst:	pointer to the destination sg list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)  * @resume:	pointer to resume function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)  * @total:	request buffer length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * @buf:	pointer to page buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  * @id:		the current use of ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)  * @flags:	it's describing AES operation state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)  * @lock:	the async queue lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)  * Structure used to record AES execution state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct mtk_aes_rec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct mtk_cryp *cryp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	struct crypto_queue queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	struct crypto_async_request *areq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	struct tasklet_struct done_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	struct tasklet_struct queue_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct mtk_aes_base_ctx *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct mtk_aes_dma src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	struct mtk_aes_dma dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct scatterlist aligned_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct scatterlist *real_dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	mtk_aes_fn resume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	size_t total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	void *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	/* queue lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)  * struct mtk_sha_rec - SHA operation record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  * @cryp:	pointer to Cryptographic device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * @queue:	crypto request queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  * @req:	pointer to ahash request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  * @done_task:	the tasklet is use in SHA interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)  * @queue_task:	the tasklet is used to dequeue request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  * @id:		the current use of ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)  * @flags:	it's describing SHA operation state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)  * @lock:	the async queue lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  * Structure used to record SHA execution state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct mtk_sha_rec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct mtk_cryp *cryp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct crypto_queue queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct ahash_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	struct tasklet_struct done_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	struct tasklet_struct queue_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	/* queue lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)  * struct mtk_cryp - Cryptographic device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)  * @base:	pointer to mapped register I/O base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)  * @dev:	pointer to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  * @clk_cryp:	pointer to crypto clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  * @irq:	global system and rings IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  * @ring:	pointer to descriptor rings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  * @aes:	pointer to operation record of AES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)  * @sha:	pointer to operation record of SHA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)  * @aes_list:	device list of AES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)  * @sha_list:	device list of SHA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)  * @rec:	it's used to select SHA record for tfm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)  * Structure storing cryptographic device information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct mtk_cryp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	struct clk *clk_cryp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	int irq[MTK_IRQ_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct mtk_ring *ring[MTK_RING_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct mtk_aes_rec *aes[MTK_REC_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct mtk_sha_rec *sha[MTK_REC_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	struct list_head aes_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	struct list_head sha_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	bool rec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int mtk_cipher_alg_register(struct mtk_cryp *cryp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) void mtk_cipher_alg_release(struct mtk_cryp *cryp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int mtk_hash_alg_register(struct mtk_cryp *cryp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) void mtk_hash_alg_release(struct mtk_cryp *cryp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #endif /* __MTK_PLATFORM_H_ */