^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * exynos-rng.c - Random Number Generator driver for the Exynos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2017 Krzysztof Kozlowski <krzk@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Loosely based on old driver from drivers/char/hw_random/exynos-rng.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2012 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Jonghwa Lee <jonghwa3.lee@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/crypto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <crypto/internal/rng.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define EXYNOS_RNG_CONTROL 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define EXYNOS_RNG_STATUS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define EXYNOS_RNG_SEED_CONF 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define EXYNOS_RNG_GEN_PRNG BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define EXYNOS_RNG_SEED_BASE 0x140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define EXYNOS_RNG_SEED(n) (EXYNOS_RNG_SEED_BASE + (n * 0x4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define EXYNOS_RNG_OUT_BASE 0x160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define EXYNOS_RNG_OUT(n) (EXYNOS_RNG_OUT_BASE + (n * 0x4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* EXYNOS_RNG_CONTROL bit fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define EXYNOS_RNG_CONTROL_START 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* EXYNOS_RNG_STATUS bit fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define EXYNOS_RNG_STATUS_SEED_SETTING_DONE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define EXYNOS_RNG_STATUS_RNG_DONE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Five seed and output registers, each 4 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define EXYNOS_RNG_SEED_REGS 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define EXYNOS_RNG_SEED_SIZE (EXYNOS_RNG_SEED_REGS * 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) enum exynos_prng_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) EXYNOS_PRNG_UNKNOWN = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) EXYNOS_PRNG_EXYNOS4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) EXYNOS_PRNG_EXYNOS5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Driver re-seeds itself with generated random numbers to hinder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * backtracking of the original seed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * Time for next re-seed in ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define EXYNOS_RNG_RESEED_TIME 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define EXYNOS_RNG_RESEED_BYTES 65536
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * In polling mode, do not wait infinitely for the engine to finish the work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define EXYNOS_RNG_WAIT_RETRIES 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Context for crypto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct exynos_rng_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct exynos_rng_dev *rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Device associated memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct exynos_rng_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) enum exynos_prng_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) void __iomem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Generated numbers stored for seeding during resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 seed_save[EXYNOS_RNG_SEED_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int seed_save_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Time of last seeding in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned long last_seeding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Bytes generated since last seeding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned long bytes_seeding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static struct exynos_rng_dev *exynos_rng_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static u32 exynos_rng_readl(struct exynos_rng_dev *rng, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return readl_relaxed(rng->mem + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static void exynos_rng_writel(struct exynos_rng_dev *rng, u32 val, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) writel_relaxed(val, rng->mem + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static int exynos_rng_set_seed(struct exynos_rng_dev *rng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) const u8 *seed, unsigned int slen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Round seed length because loop iterates over full register size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) slen = ALIGN_DOWN(slen, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (slen < EXYNOS_RNG_SEED_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) for (i = 0; i < slen ; i += 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned int seed_reg = (i / 4) % EXYNOS_RNG_SEED_REGS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) val = seed[i] << 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) val |= seed[i + 1] << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) val |= seed[i + 2] << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) val |= seed[i + 3] << 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) exynos_rng_writel(rng, val, EXYNOS_RNG_SEED(seed_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) val = exynos_rng_readl(rng, EXYNOS_RNG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (!(val & EXYNOS_RNG_STATUS_SEED_SETTING_DONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_warn(rng->dev, "Seed setting not finished\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) rng->last_seeding = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) rng->bytes_seeding = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * Start the engine and poll for finish. Then read from output registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * filling the 'dst' buffer up to 'dlen' bytes or up to size of generated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * random data (EXYNOS_RNG_SEED_SIZE).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * On success: return 0 and store number of read bytes under 'read' address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * On error: return -ERRNO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int exynos_rng_get_random(struct exynos_rng_dev *rng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u8 *dst, unsigned int dlen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned int *read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int retry = EXYNOS_RNG_WAIT_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (rng->type == EXYNOS_PRNG_EXYNOS4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) exynos_rng_writel(rng, EXYNOS_RNG_CONTROL_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) EXYNOS_RNG_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) } else if (rng->type == EXYNOS_PRNG_EXYNOS5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) exynos_rng_writel(rng, EXYNOS_RNG_GEN_PRNG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) EXYNOS_RNG_SEED_CONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) while (!(exynos_rng_readl(rng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) EXYNOS_RNG_STATUS) & EXYNOS_RNG_STATUS_RNG_DONE) && --retry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (!retry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* Clear status bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) exynos_rng_writel(rng, EXYNOS_RNG_STATUS_RNG_DONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) EXYNOS_RNG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *read = min_t(size_t, dlen, EXYNOS_RNG_SEED_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) memcpy_fromio(dst, rng->mem + EXYNOS_RNG_OUT_BASE, *read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) rng->bytes_seeding += *read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Re-seed itself from time to time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static void exynos_rng_reseed(struct exynos_rng_dev *rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned long next_seeding = rng->last_seeding + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) msecs_to_jiffies(EXYNOS_RNG_RESEED_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned long now = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned int read = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u8 seed[EXYNOS_RNG_SEED_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (time_before(now, next_seeding) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) rng->bytes_seeding < EXYNOS_RNG_RESEED_BYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (exynos_rng_get_random(rng, seed, sizeof(seed), &read))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) exynos_rng_set_seed(rng, seed, read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* Let others do some of their job. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) mutex_unlock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) mutex_lock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int exynos_rng_generate(struct crypto_rng *tfm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) const u8 *src, unsigned int slen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u8 *dst, unsigned int dlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct exynos_rng_dev *rng = ctx->rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) unsigned int read = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ret = clk_prepare_enable(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) mutex_lock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = exynos_rng_get_random(rng, dst, dlen, &read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) dlen -= read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) dst += read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) exynos_rng_reseed(rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) } while (dlen > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) mutex_unlock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) clk_disable_unprepare(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int exynos_rng_seed(struct crypto_rng *tfm, const u8 *seed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) unsigned int slen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct exynos_rng_dev *rng = ctx->rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ret = clk_prepare_enable(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) mutex_lock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ret = exynos_rng_set_seed(ctx->rng, seed, slen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) mutex_unlock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) clk_disable_unprepare(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int exynos_rng_kcapi_init(struct crypto_tfm *tfm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct exynos_rng_ctx *ctx = crypto_tfm_ctx(tfm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ctx->rng = exynos_rng_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static struct rng_alg exynos_rng_alg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .generate = exynos_rng_generate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .seed = exynos_rng_seed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .seedsize = EXYNOS_RNG_SEED_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .base = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .cra_name = "stdrng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .cra_driver_name = "exynos_rng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .cra_priority = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .cra_ctxsize = sizeof(struct exynos_rng_ctx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .cra_module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .cra_init = exynos_rng_kcapi_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int exynos_rng_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct exynos_rng_dev *rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (exynos_rng_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return -EEXIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (!rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) rng->type = (enum exynos_prng_type)of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) mutex_init(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) rng->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) rng->clk = devm_clk_get(&pdev->dev, "secss");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (IS_ERR(rng->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) dev_err(&pdev->dev, "Couldn't get clock.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return PTR_ERR(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) rng->mem = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (IS_ERR(rng->mem))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return PTR_ERR(rng->mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) platform_set_drvdata(pdev, rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) exynos_rng_dev = rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = crypto_register_rng(&exynos_rng_alg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) "Couldn't register rng crypto alg: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) exynos_rng_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int exynos_rng_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) crypto_unregister_rng(&exynos_rng_alg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) exynos_rng_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static int __maybe_unused exynos_rng_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct exynos_rng_dev *rng = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* If we were never seeded then after resume it will be the same */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (!rng->last_seeding)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) rng->seed_save_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ret = clk_prepare_enable(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) mutex_lock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* Get new random numbers and store them for seeding on resume. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) exynos_rng_get_random(rng, rng->seed_save, sizeof(rng->seed_save),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) &(rng->seed_save_len));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) mutex_unlock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) dev_dbg(rng->dev, "Stored %u bytes for seeding on system resume\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) rng->seed_save_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) clk_disable_unprepare(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static int __maybe_unused exynos_rng_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct exynos_rng_dev *rng = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* Never seeded so nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (!rng->last_seeding)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ret = clk_prepare_enable(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) mutex_lock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ret = exynos_rng_set_seed(rng, rng->seed_save, rng->seed_save_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) mutex_unlock(&rng->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) clk_disable_unprepare(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static SIMPLE_DEV_PM_OPS(exynos_rng_pm_ops, exynos_rng_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) exynos_rng_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static const struct of_device_id exynos_rng_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .compatible = "samsung,exynos4-rng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .data = (const void *)EXYNOS_PRNG_EXYNOS4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .compatible = "samsung,exynos5250-prng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .data = (const void *)EXYNOS_PRNG_EXYNOS5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MODULE_DEVICE_TABLE(of, exynos_rng_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static struct platform_driver exynos_rng_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .name = "exynos-rng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .pm = &exynos_rng_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .of_match_table = exynos_rng_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .probe = exynos_rng_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .remove = exynos_rng_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) module_platform_driver(exynos_rng_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) MODULE_DESCRIPTION("Exynos H/W Random Number Generator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) MODULE_AUTHOR("Krzysztof Kozlowski <krzk@kernel.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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