^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: MIT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2019,2021 Advanced Micro Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Rijo Thomas <Rijo-john.Thomas@amd.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* This file describes the TEE communication interface between host and AMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Secure Processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef __TEE_DEV_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define __TEE_DEV_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TEE_DEFAULT_TIMEOUT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MAX_BUFFER_SIZE 988
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * enum tee_ring_cmd_id - TEE interface commands for ring buffer configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @TEE_RING_INIT_CMD: Initialize ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * @TEE_RING_DESTROY_CMD: Destroy ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * @TEE_RING_MAX_CMD: Maximum command id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum tee_ring_cmd_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) TEE_RING_INIT_CMD = 0x00010000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) TEE_RING_DESTROY_CMD = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) TEE_RING_MAX_CMD = 0x000F0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * struct tee_init_ring_cmd - Command to init TEE ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @low_addr: bits [31:0] of the physical address of ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * @hi_addr: bits [63:32] of the physical address of ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @size: size of ring buffer in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct tee_init_ring_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u32 low_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 hi_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MAX_RING_BUFFER_ENTRIES 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * struct ring_buf_manager - Helper structure to manage ring buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @ring_start: starting address of ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @ring_size: size of ring buffer in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @ring_pa: physical address of ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @wptr: index to the last written entry in ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct ring_buf_manager {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct mutex mutex; /* synchronizes access to ring buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) void *ring_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 ring_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) phys_addr_t ring_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u32 wptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct psp_tee_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct psp_device *psp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void __iomem *io_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct tee_vdata *vdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct ring_buf_manager rb_mgr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * enum tee_cmd_state - TEE command states for the ring buffer interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @TEE_CMD_STATE_INIT: initial state of command when sent from host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @TEE_CMD_STATE_PROCESS: command being processed by TEE environment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @TEE_CMD_STATE_COMPLETED: command processing completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) enum tee_cmd_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) TEE_CMD_STATE_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) TEE_CMD_STATE_PROCESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) TEE_CMD_STATE_COMPLETED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * enum cmd_resp_state - TEE command's response status maintained by driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * @CMD_RESPONSE_INVALID: initial state when no command is written to ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * @CMD_WAITING_FOR_RESPONSE: driver waiting for response from TEE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * @CMD_RESPONSE_TIMEDOUT: failed to get response from TEE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * @CMD_RESPONSE_COPIED: driver has copied response from TEE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) enum cmd_resp_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) CMD_RESPONSE_INVALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) CMD_WAITING_FOR_RESPONSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) CMD_RESPONSE_TIMEDOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) CMD_RESPONSE_COPIED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * struct tee_ring_cmd - Structure of the command buffer in TEE ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @cmd_id: refers to &enum tee_cmd_id. Command id for the ring buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @cmd_state: refers to &enum tee_cmd_state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @status: status of TEE command execution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @res0: reserved region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @pdata: private data (currently unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @res1: reserved region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @buf: TEE command specific buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @flag: refers to &enum cmd_resp_state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct tee_ring_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 cmd_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 cmd_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u32 res0[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u64 pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u32 res1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 buf[MAX_BUFFER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Total size: 1024 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int tee_dev_init(struct psp_device *psp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) void tee_dev_destroy(struct psp_device *psp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif /* __TEE_DEV_H__ */