^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Public definitions for the CAAM/QI (Queue Interface) backend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2013-2016 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2016-2017, 2020 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __QI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __QI_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <soc/fsl/qman.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "compat.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "desc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "desc_constr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* Length of a single buffer in the QI driver memory cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CAAM_QI_MEMCACHE_SIZE 768
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern bool caam_congested __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * This is the request structure the driver application should fill while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * submitting a job to driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct caam_drv_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * caam_qi_cbk - application's callback function invoked by the driver when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * request has been successfully processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @drv_req: original request that was submitted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @status: completion status of request (0 - success, non-zero - error code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) typedef void (*caam_qi_cbk)(struct caam_drv_req *drv_req, u32 status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) enum optype {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ENCRYPT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) DECRYPT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) NUM_OP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * caam_drv_ctx - CAAM/QI backend driver context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * The jobs are processed by the driver against a driver context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * With every cryptographic context, a driver context is attached.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * The driver context contains data for private use by driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * For the applications, this is an opaque structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * @prehdr: preheader placed before shrd desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @sh_desc: shared descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @context_a: shared descriptor dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @req_fq: to-CAAM request frame queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @rsp_fq: from-CAAM response frame queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @refcnt: reference counter incremented for each frame enqueued in to-CAAM FQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @cpu: cpu on which to receive CAAM response
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @op_type: operation type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @qidev: device pointer for CAAM/QI backend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct caam_drv_ctx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u32 prehdr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 sh_desc[MAX_SDLEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) dma_addr_t context_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct qman_fq *req_fq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct qman_fq *rsp_fq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) refcount_t refcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) enum optype op_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct device *qidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) } ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * caam_drv_req - The request structure the driver application should fill while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * submitting a job to driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @fd_sgt: QMan S/G pointing to output (fd_sgt[0]) and input (fd_sgt[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * @cbk: callback function to invoke when job is completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @app_ctx: arbitrary context attached with request by the application
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * The fields mentioned below should not be used by application.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * These are for private use by driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @hdr__: linked list header to maintain list of outstanding requests to CAAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * @hwaddr: DMA address for the S/G table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct caam_drv_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct qm_sg_entry fd_sgt[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct caam_drv_ctx *drv_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) caam_qi_cbk cbk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) void *app_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) } ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * caam_drv_ctx_init - Initialise a CAAM/QI driver context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * A CAAM/QI driver context must be attached with each cryptographic context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * This function allocates memory for CAAM/QI context and returns a handle to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * the application. This handle must be submitted along with each enqueue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * request to the driver by the application.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @cpu: CPU where the application prefers to the driver to receive CAAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * responses. The request completion callback would be issued from this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @sh_desc: shared descriptor pointer to be attached with CAAM/QI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Returns a driver context on success or negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev, int *cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 *sh_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * caam_qi_enqueue - Submit a request to QI backend driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * The request structure must be properly filled as described above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @qidev: device pointer for QI backend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @req: CAAM QI request structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * Returns 0 on success or negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * caam_drv_ctx_busy - Check if there are too many jobs pending with CAAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * or too many CAAM responses are pending to be processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @drv_ctx: driver context for which job is to be submitted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * Returns caam congestion status 'true/false'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) bool caam_drv_ctx_busy(struct caam_drv_ctx *drv_ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * caam_drv_ctx_update - Update QI driver context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * Invoked when shared descriptor is required to be change in driver context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * @drv_ctx: driver context to be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * @sh_desc: new shared descriptor pointer to be updated in QI driver context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Returns 0 on success or negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * caam_drv_ctx_rel - Release a QI driver context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * @drv_ctx: context to be released
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int caam_qi_init(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * qi_cache_alloc - Allocate buffers from CAAM-QI cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) needs data which has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * to be allocated on the hotpath. Instead of using malloc, one can use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * services of the CAAM QI memory cache (backed by kmem_cache). The buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * will have a size of 256B, which is sufficient for hosting 16 SG entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * @flags: flags that would be used for the equivalent malloc(..) call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * Returns a pointer to a retrieved buffer on success or NULL on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void *qi_cache_alloc(gfp_t flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * qi_cache_free - Frees buffers allocated from CAAM-QI cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) no longer needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * the buffer previously allocated by a qi_cache_alloc call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * No checking is being done, the call is a passthrough call to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * kmem_cache_free(...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * @obj: object previously allocated using qi_cache_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) void qi_cache_free(void *obj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #endif /* __QI_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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