^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * CAAM Protocol Data Block (PDB) definition header file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2008-2016 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef CAAM_PDB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define CAAM_PDB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "compat.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * PDB- IPSec ESP Header Modification Options
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PDBHMO_ESP_DECAP_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PDBHMO_ESP_ENCAP_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Encap and Decap - Decrement TTL (Hop Limit) - Based on the value of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Options Byte IP version (IPvsn) field:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * if IPv4, decrement the inner IP header TTL field (byte 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * if IPv6 decrement the inner IP header Hop Limit field (byte 7).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PDBHMO_ESP_DECAP_DEC_TTL (0x02 << PDBHMO_ESP_DECAP_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PDBHMO_ESP_ENCAP_DEC_TTL (0x02 << PDBHMO_ESP_ENCAP_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Decap - DiffServ Copy - Copy the IPv4 TOS or IPv6 Traffic Class byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * from the outer IP header to the inner IP header.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PDBHMO_ESP_DIFFSERV (0x01 << PDBHMO_ESP_DECAP_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Encap- Copy DF bit -if an IPv4 tunnel mode outer IP header is coming from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * the PDB, copy the DF bit from the inner IP header to the outer IP header.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PDBHMO_ESP_DFBIT (0x04 << PDBHMO_ESP_ENCAP_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PDBNH_ESP_ENCAP_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PDBNH_ESP_ENCAP_MASK (0xff << PDBNH_ESP_ENCAP_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PDBHDRLEN_ESP_DECAP_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PDBHDRLEN_MASK (0x0fff << PDBHDRLEN_ESP_DECAP_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PDB_NH_OFFSET_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PDB_NH_OFFSET_MASK (0xff << PDB_NH_OFFSET_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * PDB - IPSec ESP Encap/Decap Options
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PDBOPTS_ESP_ARSNONE 0x00 /* no antireplay window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PDBOPTS_ESP_ARS32 0x40 /* 32-entry antireplay window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PDBOPTS_ESP_ARS128 0x80 /* 128-entry antireplay window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PDBOPTS_ESP_ARS64 0xc0 /* 64-entry antireplay window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PDBOPTS_ESP_ARS_MASK 0xc0 /* antireplay window mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PDBOPTS_ESP_IVSRC 0x20 /* IV comes from internal random gen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PDBOPTS_ESP_ESN 0x10 /* extended sequence included */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PDBOPTS_ESP_OUTFMT 0x08 /* output only decapsulation (decap) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PDBOPTS_ESP_IPHDRSRC 0x08 /* IP header comes from PDB (encap) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PDBOPTS_ESP_INCIPHDR 0x04 /* Prepend IP header to output frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PDBOPTS_ESP_IPVSN 0x02 /* process IPv6 header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PDBOPTS_ESP_AOFL 0x04 /* adjust out frame len (decap, SEC>=5.3)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PDBOPTS_ESP_TUNNEL 0x01 /* tunnel mode next-header byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PDBOPTS_ESP_IPV6 0x02 /* ip header version is V6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PDBOPTS_ESP_DIFFSERV 0x40 /* copy TOS/TC from inner iphdr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PDBOPTS_ESP_UPDATE_CSUM 0x80 /* encap-update ip header checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PDBOPTS_ESP_VERIFY_CSUM 0x20 /* decap-validate ip header checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * General IPSec encap/decap PDB definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * ipsec_encap_cbc - PDB part for IPsec CBC encapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @iv: 16-byte array initialization vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct ipsec_encap_cbc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u8 iv[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * ipsec_encap_ctr - PDB part for IPsec CTR encapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * @ctr_nonce: 4-byte array nonce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @ctr_initial: initial count constant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @iv: initialization vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct ipsec_encap_ctr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u8 ctr_nonce[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u32 ctr_initial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u64 iv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * ipsec_encap_ccm - PDB part for IPsec CCM encapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @salt: 3-byte array salt (lower 24 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @ccm_opt: CCM algorithm options - MSB-LSB description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * b0_flags (8b) - CCM B0; use 0x5B for 8-byte ICV, 0x6B for 12-byte ICV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * 0x7B for 16-byte ICV (cf. RFC4309, RFC3610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * ctr_flags (8b) - counter flags; constant equal to 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * ctr_initial (16b) - initial count constant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @iv: initialization vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct ipsec_encap_ccm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u8 salt[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u32 ccm_opt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u64 iv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * ipsec_encap_gcm - PDB part for IPsec GCM encapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @salt: 3-byte array salt (lower 24 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @rsvd: reserved, do not use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @iv: initialization vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct ipsec_encap_gcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 salt[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u64 iv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * ipsec_encap_pdb - PDB for IPsec encapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @options: MSB-LSB description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * hmo (header manipulation options) - 4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * reserved - 4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * next header - 8b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * next header offset - 8b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * option flags (depend on selected algorithm) - 8b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @seq_num_ext_hi: (optional) IPsec Extended Sequence Number (ESN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @seq_num: IPsec sequence number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @spi: IPsec SPI (Security Parameters Index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @ip_hdr_len: optional IP Header length (in bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * reserved - 16b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * Opt. IP Hdr Len - 16b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @ip_hdr: optional IP Header content
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct ipsec_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) u32 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u32 seq_num_ext_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u32 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct ipsec_encap_cbc cbc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct ipsec_encap_ctr ctr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct ipsec_encap_ccm ccm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct ipsec_encap_gcm gcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u32 spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u32 ip_hdr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u32 ip_hdr[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * ipsec_decap_cbc - PDB part for IPsec CBC decapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * @rsvd: reserved, do not use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct ipsec_decap_cbc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u32 rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * ipsec_decap_ctr - PDB part for IPsec CTR decapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * @ctr_nonce: 4-byte array nonce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * @ctr_initial: initial count constant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct ipsec_decap_ctr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u8 ctr_nonce[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u32 ctr_initial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * ipsec_decap_ccm - PDB part for IPsec CCM decapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * @salt: 3-byte salt (lower 24 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * @ccm_opt: CCM algorithm options - MSB-LSB description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * b0_flags (8b) - CCM B0; use 0x5B for 8-byte ICV, 0x6B for 12-byte ICV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * 0x7B for 16-byte ICV (cf. RFC4309, RFC3610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * ctr_flags (8b) - counter flags; constant equal to 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * ctr_initial (16b) - initial count constant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct ipsec_decap_ccm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u8 salt[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) u32 ccm_opt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * ipsec_decap_gcm - PDB part for IPsec GCN decapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @salt: 4-byte salt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * @rsvd: reserved, do not use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct ipsec_decap_gcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u8 salt[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u32 resvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * ipsec_decap_pdb - PDB for IPsec decapsulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * @options: MSB-LSB description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * hmo (header manipulation options) - 4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * IP header length - 12b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * next header offset - 8b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * option flags (depend on selected algorithm) - 8b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * @seq_num_ext_hi: (optional) IPsec Extended Sequence Number (ESN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * @seq_num: IPsec sequence number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * @anti_replay: Anti-replay window; size depends on ARS (option flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct ipsec_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) u32 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct ipsec_decap_cbc cbc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct ipsec_decap_ctr ctr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct ipsec_decap_ccm ccm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct ipsec_decap_gcm gcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) u32 seq_num_ext_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) u32 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) __be32 anti_replay[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * IPSec ESP Datapath Protocol Override Register (DPOVRD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct ipsec_deco_dpovrd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define IPSEC_ENCAP_DECO_DPOVRD_USE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u8 ovrd_ecn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u8 ip_hdr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u8 nh_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u8 next_header; /* reserved if decap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * IEEE 802.11i WiFi Protocol Data Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define WIFI_PDBOPTS_FCS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define WIFI_PDBOPTS_AR 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct wifi_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) u16 mac_hdr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u8 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 iv_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u8 pri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u16 pn1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u32 pn2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u16 frm_ctrl_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u16 seq_ctrl_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 rsvd1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u8 cnst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u8 key_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) u8 ctr_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) u8 rsvd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u16 ctr_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct wifi_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u16 mac_hdr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u8 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u8 iv_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u8 pri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u16 pn1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u32 pn2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) u16 frm_ctrl_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) u16 seq_ctrl_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) u8 rsvd1[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u8 ctr_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u8 rsvd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u16 ctr_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * IEEE 802.16 WiMAX Protocol Data Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define WIMAX_PDBOPTS_FCS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define WIMAX_PDBOPTS_AR 0x40 /* decap only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct wimax_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) u32 nonce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u8 b0_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) u8 ctr_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u16 ctr_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* begin DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u32 pn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* end DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct wimax_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u32 nonce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u8 iv_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u8 ctr_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u16 ctr_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* begin DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u32 pn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) u8 rsvd1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u16 antireplay_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u64 antireplay_scorecard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* end DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * IEEE 801.AE MacSEC Protocol Data Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define MACSEC_PDBOPTS_FCS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define MACSEC_PDBOPTS_AR 0x40 /* used in decap only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct macsec_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) u16 aad_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u8 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u64 sci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) u16 ethertype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) u8 tci_an;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u8 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* begin DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) u32 pn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* end DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) struct macsec_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) u16 aad_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u8 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u64 sci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u8 rsvd1[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* begin DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u8 antireplay_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u32 pn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u64 antireplay_scorecard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* end DECO writeback region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * SSL/TLS/DTLS Protocol Data Blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define TLS_PDBOPTS_ARS32 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define TLS_PDBOPTS_ARS64 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define TLS_PDBOPTS_OUTFMT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define TLS_PDBOPTS_IV_WRTBK 0x02 /* 1.1/1.2/DTLS only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define TLS_PDBOPTS_EXP_RND_IV 0x01 /* 1.1/1.2/DTLS only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct tls_block_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u8 version[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) u64 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) u32 iv[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct tls_stream_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) u8 version[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u64 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) u8 j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u8 rsvd1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct dtls_block_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) u8 version[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u16 epoch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) u16 seq_num[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) u32 iv[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) struct tls_block_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) u8 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) u64 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u32 iv[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct tls_stream_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) u8 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u64 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) u8 j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) u8 rsvd1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) struct dtls_block_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) u8 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) u16 epoch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u16 seq_num[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u32 iv[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u64 antireplay_scorecard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * SRTP Protocol Data Blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define SRTP_PDBOPTS_MKI 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define SRTP_PDBOPTS_AR 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct srtp_encap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) u8 x_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u8 mki_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) u8 n_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u32 cnst0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u8 rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u16 cnst1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u16 salt[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) u16 cnst2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u32 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u32 roc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) u32 opt_mki;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) struct srtp_decap_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) u8 x_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) u8 mki_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) u8 n_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) u8 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) u32 cnst0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u8 rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) u16 cnst1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) u16 salt[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u16 cnst2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) u16 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) u16 seq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) u32 roc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u64 antireplay_scorecard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * DSA/ECDSA Protocol Data Blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) * Two of these exist: DSA-SIGN, and DSA-VERIFY. They are similar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * except for the treatment of "w" for verify, "s" for sign,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * and the placement of "a,b".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define DSA_PDB_SGF_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define DSA_PDB_SGF_MASK (0xff << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define DSA_PDB_SGF_Q (0x80 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #define DSA_PDB_SGF_R (0x40 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define DSA_PDB_SGF_G (0x20 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define DSA_PDB_SGF_W (0x10 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) #define DSA_PDB_SGF_S (0x10 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define DSA_PDB_SGF_F (0x08 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define DSA_PDB_SGF_C (0x04 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define DSA_PDB_SGF_D (0x02 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define DSA_PDB_SGF_AB_SIGN (0x02 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define DSA_PDB_SGF_AB_VERIFY (0x01 << DSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define DSA_PDB_L_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define DSA_PDB_L_MASK (0x3ff << DSA_PDB_L_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define DSA_PDB_N_MASK 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct dsa_sign_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) u32 sgf_ln; /* Use DSA_PDB_ definitions per above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) u8 *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) u8 *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) u8 *g; /* or Gx,y */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) u8 *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) u8 *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) u8 *c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) u8 *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) u8 *ab; /* ECC only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u8 *u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) struct dsa_verify_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) u32 sgf_ln;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u8 *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) u8 *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u8 *g; /* or Gx,y */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) u8 *w; /* or Wx,y */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u8 *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u8 *c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u8 *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) u8 *tmp; /* temporary data block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u8 *ab; /* only used if ECC processing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* RSA Protocol Data Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #define RSA_PDB_SGF_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #define RSA_PDB_E_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) #define RSA_PDB_E_MASK (0xFFF << RSA_PDB_E_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) #define RSA_PDB_D_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #define RSA_PDB_D_MASK (0xFFF << RSA_PDB_D_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #define RSA_PDB_Q_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #define RSA_PDB_Q_MASK (0xFFF << RSA_PDB_Q_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define RSA_PDB_SGF_F (0x8 << RSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #define RSA_PDB_SGF_G (0x4 << RSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #define RSA_PRIV_PDB_SGF_F (0x4 << RSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define RSA_PRIV_PDB_SGF_G (0x8 << RSA_PDB_SGF_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #define RSA_PRIV_KEY_FRM_1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #define RSA_PRIV_KEY_FRM_2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #define RSA_PRIV_KEY_FRM_3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * RSA Encrypt Protocol Data Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) * @sgf: scatter-gather field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) * @f_dma: dma address of input data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) * @g_dma: dma address of encrypted output data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * @n_dma: dma address of RSA modulus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * @e_dma: dma address of RSA public exponent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * @f_len: length in octets of the input data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) struct rsa_pub_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) u32 sgf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) dma_addr_t f_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dma_addr_t g_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) dma_addr_t n_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) dma_addr_t e_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) u32 f_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #define SIZEOF_RSA_PUB_PDB (2 * sizeof(u32) + 4 * caam_ptr_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * RSA Decrypt PDB - Private Key Form #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * @sgf: scatter-gather field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * @g_dma: dma address of encrypted input data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * @f_dma: dma address of output data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * @n_dma: dma address of RSA modulus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * @d_dma: dma address of RSA private exponent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct rsa_priv_f1_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) u32 sgf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) dma_addr_t g_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) dma_addr_t f_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) dma_addr_t n_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) dma_addr_t d_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) #define SIZEOF_RSA_PRIV_F1_PDB (sizeof(u32) + 4 * caam_ptr_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * RSA Decrypt PDB - Private Key Form #2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * @sgf : scatter-gather field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * @g_dma : dma address of encrypted input data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * @f_dma : dma address of output data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * @d_dma : dma address of RSA private exponent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * @p_dma : dma address of RSA prime factor p of RSA modulus n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * @q_dma : dma address of RSA prime factor q of RSA modulus n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * @tmp1_dma: dma address of temporary buffer. CAAM uses this temporary buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * as internal state buffer. It is assumed to be as long as p.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * @tmp2_dma: dma address of temporary buffer. CAAM uses this temporary buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * as internal state buffer. It is assumed to be as long as q.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * @p_q_len : length in bytes of first two prime factors of the RSA modulus n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) struct rsa_priv_f2_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) u32 sgf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) dma_addr_t g_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) dma_addr_t f_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) dma_addr_t d_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) dma_addr_t p_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) dma_addr_t q_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) dma_addr_t tmp1_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) dma_addr_t tmp2_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) u32 p_q_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) #define SIZEOF_RSA_PRIV_F2_PDB (2 * sizeof(u32) + 7 * caam_ptr_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * RSA Decrypt PDB - Private Key Form #3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * This is the RSA Chinese Reminder Theorem (CRT) form for two prime factors of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * the RSA modulus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * @sgf : scatter-gather field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * @g_dma : dma address of encrypted input data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * @f_dma : dma address of output data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * @c_dma : dma address of RSA CRT coefficient
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * @p_dma : dma address of RSA prime factor p of RSA modulus n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * @q_dma : dma address of RSA prime factor q of RSA modulus n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * @dp_dma : dma address of RSA CRT exponent of RSA prime factor p
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * @dp_dma : dma address of RSA CRT exponent of RSA prime factor q
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * @tmp1_dma: dma address of temporary buffer. CAAM uses this temporary buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * as internal state buffer. It is assumed to be as long as p.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * @tmp2_dma: dma address of temporary buffer. CAAM uses this temporary buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * as internal state buffer. It is assumed to be as long as q.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) * @p_q_len : length in bytes of first two prime factors of the RSA modulus n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct rsa_priv_f3_pdb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) u32 sgf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) dma_addr_t g_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) dma_addr_t f_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) dma_addr_t c_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) dma_addr_t p_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) dma_addr_t q_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) dma_addr_t dp_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) dma_addr_t dq_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) dma_addr_t tmp1_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) dma_addr_t tmp2_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u32 p_q_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) #define SIZEOF_RSA_PRIV_F3_PDB (2 * sizeof(u32) + 9 * caam_ptr_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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