Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * CAAM/SEC 4.x driver backend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Private/internal definitions between modules
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright 2008-2011 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright 2019 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #ifndef INTERN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define INTERN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "ctrl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <crypto/engine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /* Currently comes from Kconfig param as a ^2 (driver-required) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* Kconfig params for interrupt coalescing if selected (else zero) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define JOBR_INTC JRCFG_ICEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define JOBR_INTC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define JOBR_INTC_TIME_THLD 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define JOBR_INTC_COUNT_THLD 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * Storage for tracking each in-process entry moving across a ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * Each entry on an output ring needs one of these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) struct caam_jrentry_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	void *cbkarg;	/* Argument per ring entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32 *desc_addr_virt;	/* Stored virt addr for postprocessing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	dma_addr_t desc_addr_dma;	/* Stored bus addr for done matching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	u32 desc_size;	/* Stored size for postprocessing, header derived */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /* Private sub-storage for a single JobR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) struct caam_drv_private_jr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct list_head	list_node;	/* Job Ring device list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	int ridx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct caam_job_ring __iomem *rregs;	/* JobR's register space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct tasklet_struct irqtask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	int irq;			/* One per queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	bool hwrng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	/* Number of scatterlist crypt transforms active on the JobR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	atomic_t tfm_count ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* Job ring info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct caam_jrentry_info *entinfo;	/* Alloc'ed 1 per ring entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32 inpring_avail;	/* Number of free entries in input ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	int head;			/* entinfo (s/w ring) head index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	void *inpring;			/* Base of input ring, alloc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 					 * DMA-safe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	int out_ring_read_index;	/* Output index "tail" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int tail;			/* entinfo (s/w ring) tail index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	void *outring;			/* Base of output ring, DMA-safe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct crypto_engine *engine;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * Driver-private storage for a single CAAM block instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) struct caam_drv_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	/* Physical-presence section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct caam_ctrl __iomem *ctrl; /* controller region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct caam_deco __iomem *deco; /* DECO/CCB views */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct caam_assurance __iomem *assure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct caam_queue_if __iomem *qi; /* QI control region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct caam_job_ring __iomem *jr[4];	/* JobR's register space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct iommu_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	 * Detected geometry block. Filled in from device tree if powerpc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	 * or from register-based version detection code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u8 total_jobrs;		/* Total Job Rings in device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	u8 qi_present;		/* Nonzero if QI present in device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u8 mc_en;		/* Nonzero if MC f/w is active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int secvio_irq;		/* Security violation interrupt number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int virt_en;		/* Virtualization enabled in CAAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int era;		/* CAAM Era (internal HW revision) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define	RNG4_MAX_HANDLES 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	/* RNG4 block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	u32 rng4_sh_init;	/* This bitmap shows which of the State
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				   Handles of the RNG4 block are initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				   by this driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct clk_bulk_data *clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	int num_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 * debugfs entries for developer view into driver/device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 * variables at runtime.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct dentry *ctl; /* controller dir */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int caam_algapi_init(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void caam_algapi_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static inline int caam_algapi_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static inline void caam_algapi_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int caam_algapi_hash_init(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) void caam_algapi_hash_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static inline int caam_algapi_hash_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static inline void caam_algapi_hash_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int caam_pkc_init(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) void caam_pkc_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static inline int caam_pkc_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static inline void caam_pkc_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int caam_rng_init(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) void caam_rng_exit(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static inline int caam_rng_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static inline void caam_rng_exit(struct device *dev) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #ifdef CONFIG_CAAM_QI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int caam_qi_algapi_init(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) void caam_qi_algapi_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline int caam_qi_algapi_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static inline void caam_qi_algapi_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #endif /* CONFIG_CAAM_QI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static inline u64 caam_get_dma_mask(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	struct device_node *nprop = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (caam_ptr_sz != sizeof(u64))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		return DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (caam_dpaa2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		return DMA_BIT_MASK(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	    of_device_is_compatible(nprop, "fsl,sec-v5.0"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		return DMA_BIT_MASK(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	return DMA_BIT_MASK(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #endif /* INTERN_H */