Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * CAAM Error Reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2009-2011 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include "compat.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include "regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include "desc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "error.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/highmem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) void caam_dump_sg(const char *prefix_str, int prefix_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 		  int rowsize, int groupsize, struct scatterlist *sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 		  size_t tlen, bool ascii)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	struct scatterlist *it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	void *it_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	void *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		 * make sure the scatterlist's page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		 * has a valid virtual memory mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		it_page = kmap_atomic(sg_page(it));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		if (unlikely(!it_page)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			pr_err("caam_dump_sg: kmap failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		buf = it_page + it->offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		len = min_t(size_t, tlen, it->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		print_hex_dump_debug(prefix_str, prefix_type, rowsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 				     groupsize, buf, len, ascii);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		tlen -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		kunmap_atomic(it_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) void caam_dump_sg(const char *prefix_str, int prefix_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		  int rowsize, int groupsize, struct scatterlist *sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		  size_t tlen, bool ascii)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #endif /* DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) EXPORT_SYMBOL(caam_dump_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) bool caam_little_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) EXPORT_SYMBOL(caam_little_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) bool caam_imx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) EXPORT_SYMBOL(caam_imx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) size_t caam_ptr_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) EXPORT_SYMBOL(caam_ptr_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	const char *error_text;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) } desc_error_list[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	{ 0x00, "No error." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	{ 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	{ 0x02, "SGT Null Entry Error." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	{ 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	{ 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	{ 0x05, "Reserved." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	{ 0x06, "Invalid KEY Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{ 0x07, "Invalid LOAD Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	{ 0x08, "Invalid STORE Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	{ 0x09, "Invalid OPERATION Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	{ 0x0A, "Invalid FIFO LOAD Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{ 0x0B, "Invalid FIFO STORE Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	{ 0x0C, "Invalid MOVE/MOVE_LEN Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	{ 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	{ 0x0E, "Invalid MATH Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	{ 0x0F, "Invalid SIGNATURE Command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{ 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	{ 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	{ 0x12, "Shared Descriptor Header Error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	{ 0x13, "Header Error. Invalid length or parity, or certain other problems." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	{ 0x14, "Burster Error. Burster has gotten to an illegal state" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	{ 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	{ 0x16, "DMA Error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	{ 0x17, "Reserved." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	{ 0x1A, "Job failed due to JR reset" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	{ 0x1B, "Job failed due to Fail Mode" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	{ 0x1C, "DECO Watchdog timer timeout error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	{ 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	{ 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	{ 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	{ 0x20, "DECO has completed a reset initiated via the DRR register" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	{ 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	{ 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	{ 0x23, "Read Input Frame error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	{ 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	{ 0x80, "DNR (do not run) error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	{ 0x81, "undefined protocol command" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	{ 0x82, "invalid setting in PDB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	{ 0x83, "Anti-replay LATE error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	{ 0x84, "Anti-replay REPLAY error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	{ 0x85, "Sequence number overflow" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	{ 0x86, "Sigver invalid signature" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	{ 0x87, "DSA Sign Illegal test descriptor" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	{ 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	{ 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	{ 0xC1, "Blob Command error: Undefined mode" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	{ 0xC2, "Blob Command error: Secure Memory Blob mode error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	{ 0xC4, "Blob Command error: Black Blob key or input size error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	{ 0xC5, "Blob Command error: Invalid key destination" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	{ 0xC8, "Blob Command error: Trusted/Secure mode error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	{ 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	{ 0xF1, "3GPP HFN matches or exceeds the Threshold" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	const char *error_text;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) } qi_error_list[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	{ 0x00, "No error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	{ 0x1F, "Job terminated by FQ or ICID flush" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	{ 0x20, "FD format error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	{ 0x21, "FD command format error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	{ 0x23, "FL format error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	{ 0x25, "CRJD specified in FD, but not enabled in FLC"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	{ 0x30, "Max. buffer size too small"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	{ 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{ 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	{ 0x33, "Size over/underflow (allocate mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	{ 0x34, "Size over/underflow (reuse mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	{ 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	{ 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	{ 0x41, "SBC frame format not supported (allocate mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	{ 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	{ 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	{ 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	{ 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	{ 0x46, "Annotation length exceeds offset (reuse mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	{ 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	{ 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	{ 0x4B, "Annotation output enabled but ASA cannot be expanded (frame list)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	{ 0x51, "Unsupported IF reuse mode"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	{ 0x52, "Unsupported FL use mode"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	{ 0x53, "Unsupported RJD use mode"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	{ 0x54, "Unsupported inline descriptor use mode"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	{ 0xC0, "Table buffer pool 0 depletion"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	{ 0xC1, "Table buffer pool 1 depletion"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	{ 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	{ 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	{ 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	{ 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	{ 0xD0, "FLC read error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	{ 0xD1, "FL read error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	{ 0xD2, "FL write error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	{ 0xD3, "OF SGT write error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	{ 0xD4, "PTA read error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	{ 0xD5, "PTA write error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	{ 0xD6, "OF SGT F-bit write error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	{ 0xD7, "ASA write error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	{ 0xE1, "FLC[ICR]=0 ICID error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	{ 0xE2, "FLC[ICR]=1 ICID error"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	{ 0xE4, "source of ICID flush not trusted (BDI = 0)"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static const char * const cha_id_list[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	"",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	"AES",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	"DES",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	"ARC4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	"MDHA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	"RNG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	"SNOW f8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	"Kasumi f8/9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	"PKHA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	"CRCA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	"SNOW f9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	"ZUCE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	"ZUCA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const char * const err_id_list[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	"No error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	"Mode error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	"Data size error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	"Key size error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	"PKHA A memory size error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	"PKHA B memory size error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	"Data arrived out of sequence error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	"PKHA divide-by-zero error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	"PKHA modulus even error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	"DES key parity error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	"ICV check failed.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	"Hardware error.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	"Unsupported CCM AAD size.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	"Class 1 CHA is not reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	"Invalid CHA combination was selected",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	"Invalid CHA selected.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const char * const rng_err_id_list[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	"",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	"",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	"",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	"Instantiate",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	"Not instantiated",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	"Test instantiate",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	"Prediction resistance",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	"Prediction resistance and test request",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	"Uninstantiate",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	"Secure key generation",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	"",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	"Hardware error",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	"Continuous check"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int report_ccb_status(struct device *jrdev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			     const char *error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		    JRSTA_CCBERR_CHAID_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		  JRSTA_DECOERR_INDEX_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	char *idx_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	const char *cha_str = "unidentified cha_id value 0x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	char cha_err_code[3] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	const char *err_str = "unidentified err_id value 0x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	char err_err_code[3] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (status & JRSTA_DECOERR_JUMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		idx_str = "jump tgt desc idx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		idx_str = "desc idx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (cha_id < ARRAY_SIZE(cha_id_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		cha_str = cha_id_list[cha_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	    err_id < ARRAY_SIZE(rng_err_id_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	    strlen(rng_err_id_list[err_id])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		/* RNG-only error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		err_str = rng_err_id_list[err_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		err_str = err_id_list[err_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	 * CCB ICV check failures are part of normal operation life;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	 * we leave the upper layers to do what they want with them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	if (err_id == JRSTA_CCBERR_ERRID_ICVCHK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	dev_err_ratelimited(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			    error, idx_str, idx, cha_str, cha_err_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			    err_str, err_err_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static int report_jump_status(struct device *jrdev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			      const char *error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		status, error, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static int report_deco_status(struct device *jrdev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			      const char *error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		  JRSTA_DECOERR_INDEX_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	char *idx_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	const char *err_str = "unidentified error value 0x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	char err_err_code[3] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	if (status & JRSTA_DECOERR_JUMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		idx_str = "jump tgt desc idx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		idx_str = "desc idx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		if (desc_error_list[i].value == err_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		err_str = desc_error_list[i].error_text;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		status, error, idx_str, idx, err_str, err_err_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int report_qi_status(struct device *qidev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			    const char *error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	const char *err_str = "unidentified error value 0x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	char err_err_code[3] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		if (qi_error_list[i].value == err_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		err_str = qi_error_list[i].error_text;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	dev_err(qidev, "%08x: %s: %s%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		status, error, err_str, err_err_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static int report_jr_status(struct device *jrdev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 			    const char *error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		status, error, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static int report_cond_code_status(struct device *jrdev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 				   const char *error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		status, error, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	static const struct stat_src {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		int (*report_ssed)(struct device *jrdev, const u32 status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 				   const char *error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		const char *error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	} status_src[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		{ NULL, "No error" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		{ report_ccb_status, "CCB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		{ report_jump_status, "Jump" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		{ report_deco_status, "DECO" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		{ report_qi_status, "Queue Manager Interface" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		{ report_jr_status, "Job Ring" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		{ report_cond_code_status, "Condition Code" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		{ NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	u32 ssrc = status >> JRSTA_SSRC_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	const char *error = status_src[ssrc].error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	 * If there is an error handling function, call it to report the error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	 * Otherwise print the error source name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	if (status_src[ssrc].report_ssed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		return status_src[ssrc].report_ssed(jrdev, status, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		dev_err(jrdev, "%d: %s\n", ssrc, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		dev_err(jrdev, "%d: unknown error source\n", ssrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) EXPORT_SYMBOL(caam_strstatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) MODULE_DESCRIPTION("FSL CAAM error reporting");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MODULE_AUTHOR("Freescale Semiconductor");