^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2017, Microchip Technology Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Tudor Ambarus <tudor.ambarus@microchip.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __ATMEL_I2C_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __ATMEL_I2C_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define ATMEL_ECC_PRIORITY 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define COMMAND 0x03 /* packet function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SLEEP_TOKEN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define WAKE_TOKEN_MAX_SIZE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Definitions of Data and Command sizes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define WORD_ADDR_SIZE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define COUNT_SIZE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CRC_SIZE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CMD_OVERHEAD_SIZE (COUNT_SIZE + CRC_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* size in bytes of the n prime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ATMEL_ECC_NIST_P256_N_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ATMEL_ECC_PUBKEY_SIZE (2 * ATMEL_ECC_NIST_P256_N_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define STATUS_RSP_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ECDH_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define GENKEY_RSP_SIZE (ATMEL_ECC_PUBKEY_SIZE + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) CMD_OVERHEAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define READ_RSP_SIZE (4 + CMD_OVERHEAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RANDOM_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define MAX_RSP_SIZE GENKEY_RSP_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * atmel_i2c_cmd - structure used for communicating with the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @word_addr: indicates the function of the packet sent to the device. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * byte should have a value of COMMAND for normal operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * @count : number of bytes to be transferred to (or from) the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * @opcode : the command code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @param1 : the first parameter; always present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @param2 : the second parameter; always present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * @data : optional remaining input data. Includes a 2-byte CRC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @rxsize : size of the data received from i2c client.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * @msecs : command execution time in milliseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct atmel_i2c_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u8 word_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u8 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u8 param1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) __le16 param2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u8 data[MAX_RSP_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u8 msecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u16 rxsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Status/Error codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define STATUS_SIZE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define STATUS_NOERR 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define STATUS_WAKE_SUCCESSFUL 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Definitions for eeprom organization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define CONFIG_ZONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Definitions for Indexes common to all commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define RSP_DATA_IDX 1 /* buffer index of data in response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DATA_SLOT_2 2 /* used for ECDH private key */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Definitions for the device lock state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define DEVICE_LOCK_ADDR 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define LOCK_VALUE_IDX (RSP_DATA_IDX + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define LOCK_CONFIG_IDX (RSP_DATA_IDX + 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * Wake High delay to data communication (microseconds). SDA should be stable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * high for this entire duration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define TWHI_MIN 1500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define TWHI_MAX 1550
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* Wake Low duration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define TWLO_USEC 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Command execution time (milliseconds) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MAX_EXEC_TIME_ECDH 58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MAX_EXEC_TIME_GENKEY 115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MAX_EXEC_TIME_READ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MAX_EXEC_TIME_RANDOM 50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Command opcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define OPCODE_ECDH 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define OPCODE_GENKEY 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define OPCODE_READ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define OPCODE_RANDOM 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Definitions for the READ Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define READ_COUNT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Definitions for the RANDOM Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define RANDOM_COUNT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Definitions for the GenKey Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define GENKEY_COUNT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define GENKEY_MODE_PRIVATE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Definitions for the ECDH Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define ECDH_COUNT 71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define ECDH_PREFIX_MODE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* Used for binding tfm objects to i2c clients. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct atmel_ecc_driver_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct list_head i2c_client_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) spinlock_t i2c_list_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) } ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * atmel_i2c_client_priv - i2c_client private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @client : pointer to i2c client device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * @i2c_client_list_node: part of i2c_client_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @lock : lock for sending i2c commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @wake_token : wake token array of zeros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @wake_token_sz : size in bytes of the wake_token
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * @tfm_count : number of active crypto transformations on i2c client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * Reads and writes from/to the i2c client are sequential. The first byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * transmitted to the device is treated as the byte size. Any attempt to send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * more than this number of bytes will cause the device to not ACK those bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * After the host writes a single command byte to the input buffer, reads are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * prohibited until after the device completes command execution. Use a mutex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * when sending i2c commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct atmel_i2c_client_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct list_head i2c_client_list_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) u8 wake_token[WAKE_TOKEN_MAX_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) size_t wake_token_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) atomic_t tfm_count ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct hwrng hwrng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * atmel_i2c_work_data - data structure representing the work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * @ctx : transformation context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * @cbk : pointer to a callback function to be invoked upon completion of this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * request. This has the form:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * callback(struct atmel_i2c_work_data *work_data, void *areq, u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * where:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * @work_data: data structure representing the work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * @areq : optional pointer to an argument passed with the original
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * @status : status returned from the i2c client device or i2c error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * @areq: optional pointer to a user argument for use at callback time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * @work: describes the task to be executed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * @cmd : structure used for communicating with the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct atmel_i2c_work_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) void *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) void (*cbk)(struct atmel_i2c_work_data *work_data, void *areq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void *areq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct atmel_i2c_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int atmel_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) void atmel_i2c_enqueue(struct atmel_i2c_work_data *work_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) void (*cbk)(struct atmel_i2c_work_data *work_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) void *areq, int status),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) void *areq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) void atmel_i2c_init_read_cmd(struct atmel_i2c_cmd *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct scatterlist *pubkey);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #endif /* __ATMEL_I2C_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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