Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2012-2013 Xilinx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * CPU idle support for Xilinx Zynq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * based on arch/arm/mach-at91/cpuidle.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * The cpu idle uses wait-for-interrupt and RAM self refresh in order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * to implement two idle states -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * #1 wait-for-interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * #2 wait-for-interrupt and RAM self refresh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * Maintainer: Michal Simek <michal.simek@xilinx.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ZYNQ_MAX_STATES		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Actual code that puts the SoC in different idle states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int zynq_enter_idle(struct cpuidle_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 			   struct cpuidle_driver *drv, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	/* Add code for DDR self refresh start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	cpu_do_idle();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static struct cpuidle_driver zynq_idle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	.name = "zynq_idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	.states = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			.enter			= zynq_enter_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			.exit_latency		= 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			.target_residency	= 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			.name			= "RAM_SR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			.desc			= "WFI and RAM Self Refresh",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	.safe_state_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	.state_count = ZYNQ_MAX_STATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Initialize CPU idle by registering the idle states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static int zynq_cpuidle_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	pr_info("Xilinx Zynq CpuIdle Driver started\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	return cpuidle_register(&zynq_idle_driver, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct platform_driver zynq_cpuidle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		.name = "cpuidle-zynq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	.probe = zynq_cpuidle_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) builtin_platform_driver(zynq_cpuidle_driver);