Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Marvell Armada 370, 38x and XP SoC cpuidle driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2014 Marvell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Nadav Haklai <nadavh@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Gregory CLEMENT <gregory.clement@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * License version 2.  This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * Maintainer: Gregory CLEMENT <gregory.clement@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/cpu_pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MVEBU_V7_FLAG_DEEP_IDLE	0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static int (*mvebu_v7_cpu_suspend)(int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static int mvebu_v7_enter_idle(struct cpuidle_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 				struct cpuidle_driver *drv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 				int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	bool deepidle = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	cpu_pm_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	if (drv->states[index].flags & MVEBU_V7_FLAG_DEEP_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		deepidle = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	ret = mvebu_v7_cpu_suspend(deepidle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	cpu_pm_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static struct cpuidle_driver armadaxp_idle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.name			= "armada_xp_idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.states[0]		= ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.states[1]		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.enter			= mvebu_v7_enter_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		.exit_latency		= 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.power_usage		= 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.target_residency	= 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.name			= "MV CPU IDLE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.desc			= "CPU power down",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	.states[2]		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.enter			= mvebu_v7_enter_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.exit_latency		= 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		.power_usage		= 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		.target_residency	= 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		.flags			= MVEBU_V7_FLAG_DEEP_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.name			= "MV CPU DEEP IDLE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		.desc			= "CPU and L2 Fabric power down",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.state_count = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static struct cpuidle_driver armada370_idle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.name			= "armada_370_idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.states[0]		= ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.states[1]		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		.enter			= mvebu_v7_enter_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		.exit_latency		= 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		.power_usage		= 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.target_residency	= 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		.flags			= MVEBU_V7_FLAG_DEEP_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		.name			= "Deep Idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		.desc			= "CPU and L2 Fabric power down",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.state_count = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static struct cpuidle_driver armada38x_idle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.name			= "armada_38x_idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	.states[0]		= ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.states[1]		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		.enter			= mvebu_v7_enter_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		.exit_latency		= 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		.power_usage		= 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		.target_residency	= 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		.name			= "Idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		.desc			= "CPU and SCU power down",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.state_count = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int mvebu_v7_cpuidle_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	const struct platform_device_id *id = pdev->id_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (!id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	mvebu_v7_cpu_suspend = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	return cpuidle_register((struct cpuidle_driver *)id->driver_data, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static const struct platform_device_id mvebu_cpuidle_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		.name = "cpuidle-armada-xp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		.driver_data = (unsigned long)&armadaxp_idle_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		.name = "cpuidle-armada-370",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		.driver_data = (unsigned long)&armada370_idle_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		.name = "cpuidle-armada-38x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		.driver_data = (unsigned long)&armada38x_idle_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static struct platform_driver mvebu_cpuidle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.probe = mvebu_v7_cpuidle_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		.name = "cpuidle-mbevu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		.suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.id_table = mvebu_cpuidle_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) builtin_platform_driver(mvebu_cpuidle_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MODULE_AUTHOR("Gregory CLEMENT <gregory.clement@free-electrons.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MODULE_DESCRIPTION("Marvell EBU v7 cpuidle driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_LICENSE("GPL");