^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Coupled cpuidle support based on the work of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Colin Cross <ccross@android.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Daniel Lezcano <daniel.lezcano@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/cpu_pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_data/cpuidle-exynos.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static atomic_t exynos_idle_barrier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static struct cpuidle_exynos_data *exynos_cpuidle_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static void (*exynos_enter_aftr)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int exynos_enter_coupled_lowpower(struct cpuidle_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct cpuidle_driver *drv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) exynos_cpuidle_pdata->pre_enter_aftr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Waiting all cpus to reach this point at the same moment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Both cpus will reach this point at the same time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret = dev->cpu ? exynos_cpuidle_pdata->cpu1_powerdown()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) : exynos_cpuidle_pdata->cpu0_enter_aftr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) index = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Waiting all cpus to finish the power sequence before going further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) exynos_cpuidle_pdata->post_enter_aftr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int exynos_enter_lowpower(struct cpuidle_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct cpuidle_driver *drv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int new_index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* AFTR can only be entered when cores other than CPU0 are offline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (num_online_cpus() > 1 || dev->cpu != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) new_index = drv->safe_state_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (new_index == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return arm_cpuidle_simple_enter(dev, drv, new_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) exynos_enter_aftr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return new_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static struct cpuidle_driver exynos_idle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .name = "exynos_idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .states = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) [0] = ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .enter = exynos_enter_lowpower,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .exit_latency = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .target_residency = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .name = "C1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .desc = "ARM power down",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .state_count = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .safe_state_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static struct cpuidle_driver exynos_coupled_idle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .name = "exynos_coupled_idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .states = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) [0] = ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .enter = exynos_enter_coupled_lowpower,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .exit_latency = 5000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .target_residency = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .flags = CPUIDLE_FLAG_COUPLED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) CPUIDLE_FLAG_TIMER_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .name = "C1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .desc = "ARM power down",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .state_count = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .safe_state_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int exynos_cpuidle_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (IS_ENABLED(CONFIG_SMP) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) (of_machine_is_compatible("samsung,exynos4210") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) of_machine_is_compatible("samsung,exynos3250"))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) exynos_cpuidle_pdata = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ret = cpuidle_register(&exynos_coupled_idle_driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) cpu_possible_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) exynos_enter_aftr = (void *)(pdev->dev.platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = cpuidle_register(&exynos_idle_driver, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) dev_err(&pdev->dev, "failed to register cpuidle driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static struct platform_driver exynos_cpuidle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .probe = exynos_cpuidle_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .name = "exynos_cpuidle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) builtin_platform_driver(exynos_cpuidle_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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