^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014 Imagination Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Paul Burton <paul.burton@mips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/cpu_pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/idle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/pm-cps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Enumeration of the various idle states this driver may enter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) enum cps_idle_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) STATE_WAIT = 0, /* MIPS wait instruction, coherent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) STATE_NC_WAIT, /* MIPS wait instruction, non-coherent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) STATE_CLOCK_GATED, /* Core clock gated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) STATE_POWER_GATED, /* Core power gated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) STATE_COUNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int cps_nc_enter(struct cpuidle_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct cpuidle_driver *drv, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) enum cps_pm_state pm_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * At least one core must remain powered up & clocked in order for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * system to have any hope of functioning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * TODO: don't treat core 0 specially, just prevent the final core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * TODO: remap interrupt affinity temporarily
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) index = STATE_NC_WAIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Select the appropriate cps_pm_state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) switch (index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) case STATE_NC_WAIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) pm_state = CPS_PM_NC_WAIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) case STATE_CLOCK_GATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) pm_state = CPS_PM_CLOCK_GATED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case STATE_POWER_GATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pm_state = CPS_PM_POWER_GATED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Notify listeners the CPU is about to power down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if ((pm_state == CPS_PM_POWER_GATED) && cpu_pm_enter())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Enter that state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) err = cps_pm_enter_state(pm_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Notify listeners the CPU is back up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (pm_state == CPS_PM_POWER_GATED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) cpu_pm_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return err ?: index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct cpuidle_driver cps_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .name = "cpc_cpuidle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .states = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [STATE_WAIT] = MIPS_CPUIDLE_WAIT_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) [STATE_NC_WAIT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .enter = cps_nc_enter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .exit_latency = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .target_residency = 450,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .name = "nc-wait",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .desc = "non-coherent MIPS wait",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) [STATE_CLOCK_GATED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .enter = cps_nc_enter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .exit_latency = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .target_residency = 700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .flags = CPUIDLE_FLAG_TIMER_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .name = "clock-gated",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .desc = "core clock gated",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) [STATE_POWER_GATED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .enter = cps_nc_enter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .exit_latency = 600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .target_residency = 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .flags = CPUIDLE_FLAG_TIMER_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .name = "power-gated",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .desc = "core power gated",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .state_count = STATE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .safe_state_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void __init cps_cpuidle_unregister(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct cpuidle_device *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) device = &per_cpu(cpuidle_dev, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) cpuidle_unregister_device(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) cpuidle_unregister_driver(&cps_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int __init cps_cpuidle_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int err, cpu, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct cpuidle_device *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Detect supported states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (!cps_pm_support_state(CPS_PM_POWER_GATED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) cps_driver.state_count = STATE_CLOCK_GATED + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (!cps_pm_support_state(CPS_PM_CLOCK_GATED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) cps_driver.state_count = STATE_NC_WAIT + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (!cps_pm_support_state(CPS_PM_NC_WAIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cps_driver.state_count = STATE_WAIT + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* Inform the user if some states are unavailable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (cps_driver.state_count < STATE_COUNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pr_info("cpuidle-cps: limited to ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) switch (cps_driver.state_count - 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) case STATE_WAIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pr_cont("coherent wait\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) case STATE_NC_WAIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) pr_cont("non-coherent wait\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) case STATE_CLOCK_GATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) pr_cont("clock gating\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Set the coupled flag on the appropriate states if this system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * requires it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (coupled_coherence)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) for (i = STATE_NC_WAIT; i < cps_driver.state_count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) cps_driver.states[i].flags |= CPUIDLE_FLAG_COUPLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) err = cpuidle_register_driver(&cps_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) pr_err("Failed to register CPS cpuidle driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) device = &per_cpu(cpuidle_dev, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) device->cpu = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) cpumask_copy(&device->coupled_cpus, &cpu_sibling_map[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) err = cpuidle_register_device(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) pr_err("Failed to register CPU%d cpuidle device\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) cps_cpuidle_unregister();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) device_initcall(cps_cpuidle_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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