^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Versatile Express SPC CPUFreq Interface driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 - 2019 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Sudeep Holla <sudeep.holla@arm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2013 Linaro.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Viresh Kumar <viresh.kumar@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/cpumask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/cpu_cooling.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/pm_opp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/topology.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Currently we support only two clusters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define A15_CLUSTER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define A7_CLUSTER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MAX_CLUSTERS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #ifdef CONFIG_BL_SWITCHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/bL_switcher.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static bool bL_switching_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define is_bL_switching_enabled() bL_switching_enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define set_switching_enabled(x) (bL_switching_enabled = (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define is_bL_switching_enabled() false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define set_switching_enabled(x) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define bL_switch_request(...) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define bL_switcher_put_enabled() do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define bL_switcher_get_enabled() do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ACTUAL_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq << 1 : freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define VIRT_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq >> 1 : freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static struct thermal_cooling_device *cdev[MAX_CLUSTERS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct clk *clk[MAX_CLUSTERS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static struct cpufreq_frequency_table *freq_table[MAX_CLUSTERS + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static atomic_t cluster_usage[MAX_CLUSTERS + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static unsigned int clk_big_min; /* (Big) clock frequencies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static unsigned int clk_little_max; /* Maximum clock frequency (Little) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static DEFINE_PER_CPU(unsigned int, physical_cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static DEFINE_PER_CPU(unsigned int, cpu_last_req_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static struct mutex cluster_lock[MAX_CLUSTERS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static inline int raw_cpu_to_cluster(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return topology_physical_package_id(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static inline int cpu_to_cluster(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return is_bL_switching_enabled() ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MAX_CLUSTERS : raw_cpu_to_cluster(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static unsigned int find_cluster_maxfreq(int cluster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u32 max_freq = 0, cpu_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) for_each_online_cpu(j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) cpu_freq = per_cpu(cpu_last_req_freq, j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (cluster == per_cpu(physical_cluster, j) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) max_freq < cpu_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) max_freq = cpu_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return max_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static unsigned int clk_get_cpu_rate(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u32 cur_cluster = per_cpu(physical_cluster, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u32 rate = clk_get_rate(clk[cur_cluster]) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* For switcher we use virtual A7 clock rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (is_bL_switching_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) rate = VIRT_FREQ(cur_cluster, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static unsigned int ve_spc_cpufreq_get_rate(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (is_bL_switching_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return per_cpu(cpu_last_req_freq, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return clk_get_cpu_rate(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ve_spc_cpufreq_set_rate(u32 cpu, u32 old_cluster, u32 new_cluster, u32 rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u32 new_rate, prev_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) bool bLs = is_bL_switching_enabled();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) mutex_lock(&cluster_lock[new_cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (bLs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) prev_rate = per_cpu(cpu_last_req_freq, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) per_cpu(cpu_last_req_freq, cpu) = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) per_cpu(physical_cluster, cpu) = new_cluster;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) new_rate = find_cluster_maxfreq(new_cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) new_rate = ACTUAL_FREQ(new_cluster, new_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) new_rate = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ret = clk_set_rate(clk[new_cluster], new_rate * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * FIXME: clk_set_rate hasn't returned an error here however it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * may be that clk_change_rate failed due to hardware or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * firmware issues and wasn't able to report that due to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * current design of the clk core layer. To work around this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * problem we will read back the clock rate and check it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * correct. This needs to be removed once clk core is fixed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (clk_get_rate(clk[new_cluster]) != new_rate * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (WARN_ON(ret)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (bLs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) per_cpu(cpu_last_req_freq, cpu) = prev_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) per_cpu(physical_cluster, cpu) = old_cluster;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) mutex_unlock(&cluster_lock[new_cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) mutex_unlock(&cluster_lock[new_cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* Recalc freq for old cluster when switching clusters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (old_cluster != new_cluster) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* Switch cluster */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) bL_switch_request(cpu, new_cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) mutex_lock(&cluster_lock[old_cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* Set freq of old cluster if there are cpus left on it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) new_rate = find_cluster_maxfreq(old_cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) new_rate = ACTUAL_FREQ(old_cluster, new_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (new_rate &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) clk_set_rate(clk[old_cluster], new_rate * 1000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) pr_err("%s: clk_set_rate failed: %d, old cluster: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) __func__, ret, old_cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) mutex_unlock(&cluster_lock[old_cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* Set clock frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int ve_spc_cpufreq_set_target(struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) u32 cpu = policy->cpu, cur_cluster, new_cluster, actual_cluster;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) unsigned int freqs_new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) cur_cluster = cpu_to_cluster(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) new_cluster = actual_cluster = per_cpu(physical_cluster, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) freqs_new = freq_table[cur_cluster][index].frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (is_bL_switching_enabled()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (actual_cluster == A15_CLUSTER && freqs_new < clk_big_min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) new_cluster = A7_CLUSTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) else if (actual_cluster == A7_CLUSTER &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) freqs_new > clk_little_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) new_cluster = A15_CLUSTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return ve_spc_cpufreq_set_rate(cpu, actual_cluster, new_cluster,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) freqs_new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static inline u32 get_table_count(struct cpufreq_frequency_table *table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) for (count = 0; table[count].frequency != CPUFREQ_TABLE_END; count++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* get the minimum frequency in the cpufreq_frequency_table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static inline u32 get_table_min(struct cpufreq_frequency_table *table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct cpufreq_frequency_table *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u32 min_freq = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) cpufreq_for_each_entry(pos, table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (pos->frequency < min_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) min_freq = pos->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return min_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* get the maximum frequency in the cpufreq_frequency_table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static inline u32 get_table_max(struct cpufreq_frequency_table *table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct cpufreq_frequency_table *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) u32 max_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) cpufreq_for_each_entry(pos, table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (pos->frequency > max_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) max_freq = pos->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return max_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static bool search_frequency(struct cpufreq_frequency_table *table, int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) unsigned int freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) for (count = 0; count < size; count++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (table[count].frequency == freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int merge_cluster_tables(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int i, j, k = 0, count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct cpufreq_frequency_table *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) for (i = 0; i < MAX_CLUSTERS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) count += get_table_count(freq_table[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) table = kcalloc(count, sizeof(*table), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (!table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) freq_table[MAX_CLUSTERS] = table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* Add in reverse order to get freqs in increasing order */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) for (i = MAX_CLUSTERS - 1; i >= 0; i--, count = k) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) for (j = 0; freq_table[i][j].frequency != CPUFREQ_TABLE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (i == A15_CLUSTER &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) search_frequency(table, count, freq_table[i][j].frequency))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) continue; /* skip duplicates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) table[k++].frequency =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) VIRT_FREQ(i, freq_table[i][j].frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) table[k].driver_data = k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) table[k].frequency = CPUFREQ_TABLE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static void _put_cluster_clk_and_freq_table(struct device *cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) const struct cpumask *cpumask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u32 cluster = raw_cpu_to_cluster(cpu_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (!freq_table[cluster])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) clk_put(clk[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static void put_cluster_clk_and_freq_table(struct device *cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) const struct cpumask *cpumask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u32 cluster = cpu_to_cluster(cpu_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (atomic_dec_return(&cluster_usage[cluster]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (cluster < MAX_CLUSTERS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return _put_cluster_clk_and_freq_table(cpu_dev, cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) for_each_present_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct device *cdev = get_cpu_device(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (!cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) _put_cluster_clk_and_freq_table(cdev, cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* free virtual table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) kfree(freq_table[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int _get_cluster_clk_and_freq_table(struct device *cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) const struct cpumask *cpumask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u32 cluster = raw_cpu_to_cluster(cpu_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (freq_table[cluster])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * platform specific SPC code must initialise the opp table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * so just check if the OPP count is non-zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ret = dev_pm_opp_get_opp_count(cpu_dev) <= 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) clk[cluster] = clk_get(cpu_dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (!IS_ERR(clk[cluster]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) dev_err(cpu_dev, "%s: Failed to get clk for cpu: %d, cluster: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) __func__, cpu_dev->id, cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ret = PTR_ERR(clk[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) dev_err(cpu_dev, "%s: Failed to get data for cluster: %d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int get_cluster_clk_and_freq_table(struct device *cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) const struct cpumask *cpumask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u32 cluster = cpu_to_cluster(cpu_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (atomic_inc_return(&cluster_usage[cluster]) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (cluster < MAX_CLUSTERS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = _get_cluster_clk_and_freq_table(cpu_dev, cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) atomic_dec(&cluster_usage[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * Get data for all clusters and fill virtual cluster with a merge of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) for_each_present_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct device *cdev = get_cpu_device(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (!cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ret = _get_cluster_clk_and_freq_table(cdev, cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto put_clusters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ret = merge_cluster_tables();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) goto put_clusters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /* Assuming 2 cluster, set clk_big_min and clk_little_max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) clk_big_min = get_table_min(freq_table[A15_CLUSTER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) clk_little_max = VIRT_FREQ(A7_CLUSTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) get_table_max(freq_table[A7_CLUSTER]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) put_clusters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) for_each_present_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct device *cdev = get_cpu_device(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) _put_cluster_clk_and_freq_table(cdev, cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) atomic_dec(&cluster_usage[cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /* Per-CPU initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static int ve_spc_cpufreq_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) u32 cur_cluster = cpu_to_cluster(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) cpu_dev = get_cpu_device(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (!cpu_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) pr_err("%s: failed to get cpu%d device\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (cur_cluster < MAX_CLUSTERS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) dev_pm_opp_get_sharing_cpus(cpu_dev, policy->cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) for_each_cpu(cpu, policy->cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) per_cpu(physical_cluster, cpu) = cur_cluster;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* Assumption: during init, we are always running on A15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) per_cpu(physical_cluster, policy->cpu) = A15_CLUSTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ret = get_cluster_clk_and_freq_table(cpu_dev, policy->cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) policy->freq_table = freq_table[cur_cluster];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) policy->cpuinfo.transition_latency = 1000000; /* 1 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) dev_pm_opp_of_register_em(cpu_dev, policy->cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) if (is_bL_switching_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) per_cpu(cpu_last_req_freq, policy->cpu) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) clk_get_cpu_rate(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) dev_info(cpu_dev, "%s: CPU %d initialized\n", __func__, policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static int ve_spc_cpufreq_exit(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) int cur_cluster = cpu_to_cluster(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (cur_cluster < MAX_CLUSTERS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) cpufreq_cooling_unregister(cdev[cur_cluster]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) cdev[cur_cluster] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) cpu_dev = get_cpu_device(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (!cpu_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) pr_err("%s: failed to get cpu%d device\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) put_cluster_clk_and_freq_table(cpu_dev, policy->related_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static void ve_spc_cpufreq_ready(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) int cur_cluster = cpu_to_cluster(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* Do not register a cpu_cooling device if we are in IKS mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (cur_cluster >= MAX_CLUSTERS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) cdev[cur_cluster] = of_cpufreq_cooling_register(policy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static struct cpufreq_driver ve_spc_cpufreq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .name = "vexpress-spc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .flags = CPUFREQ_STICKY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) CPUFREQ_NEED_INITIAL_FREQ_CHECK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .verify = cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .target_index = ve_spc_cpufreq_set_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .get = ve_spc_cpufreq_get_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .init = ve_spc_cpufreq_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .exit = ve_spc_cpufreq_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .ready = ve_spc_cpufreq_ready,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .attr = cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #ifdef CONFIG_BL_SWITCHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int bL_cpufreq_switcher_notifier(struct notifier_block *nfb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) unsigned long action, void *_arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) pr_debug("%s: action: %ld\n", __func__, action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) switch (action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) case BL_NOTIFY_PRE_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) case BL_NOTIFY_PRE_DISABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) cpufreq_unregister_driver(&ve_spc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) case BL_NOTIFY_POST_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) set_switching_enabled(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) cpufreq_register_driver(&ve_spc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) case BL_NOTIFY_POST_DISABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) set_switching_enabled(false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) cpufreq_register_driver(&ve_spc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return NOTIFY_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static struct notifier_block bL_switcher_notifier = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .notifier_call = bL_cpufreq_switcher_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static int __bLs_register_notifier(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return bL_switcher_register_notifier(&bL_switcher_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static int __bLs_unregister_notifier(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return bL_switcher_unregister_notifier(&bL_switcher_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static int __bLs_register_notifier(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static int __bLs_unregister_notifier(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static int ve_spc_cpufreq_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) set_switching_enabled(bL_switcher_get_enabled());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) for (i = 0; i < MAX_CLUSTERS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) mutex_init(&cluster_lock[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) ret = cpufreq_register_driver(&ve_spc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) pr_info("%s: Failed registering platform driver: %s, err: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) __func__, ve_spc_cpufreq_driver.name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) ret = __bLs_register_notifier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) cpufreq_unregister_driver(&ve_spc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) pr_info("%s: Registered platform driver: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) __func__, ve_spc_cpufreq_driver.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) bL_switcher_put_enabled();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static int ve_spc_cpufreq_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) bL_switcher_get_enabled();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) __bLs_unregister_notifier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) cpufreq_unregister_driver(&ve_spc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) bL_switcher_put_enabled();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) pr_info("%s: Un-registered platform driver: %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ve_spc_cpufreq_driver.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static struct platform_driver ve_spc_cpufreq_platdrv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) .name = "vexpress-spc-cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .probe = ve_spc_cpufreq_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .remove = ve_spc_cpufreq_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) module_platform_driver(ve_spc_cpufreq_platdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) MODULE_ALIAS("platform:vexpress-spc-cpufreq");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) MODULE_DESCRIPTION("Vexpress SPC ARM big LITTLE cpufreq driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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