^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel SpeedStep SMI driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2003 Hiroshi Miura <miura@da-cha.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /*********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * SPEEDSTEP - DEFINITIONS *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define pr_fmt(fmt) "cpufreq: " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/ist.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/cpu_device_id.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "speedstep-lib.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* speedstep system management interface port/command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * These parameters are got from IST-SMI BIOS call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * If user gives it, these are used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int smi_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static int smi_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static unsigned int smi_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* info about the processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static enum speedstep_processor speedstep_processor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * There are only two frequency states for each processor. Values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * are in kHz for the time being.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct cpufreq_frequency_table speedstep_freqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {0, SPEEDSTEP_HIGH, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {0, SPEEDSTEP_LOW, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {0, 0, CPUFREQ_TABLE_END},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define GET_SPEEDSTEP_OWNER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define GET_SPEEDSTEP_STATE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SET_SPEEDSTEP_STATE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define GET_SPEEDSTEP_FREQS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* how often shall the SMI call be tried if it failed, e.g. because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * of DMA activity going on? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SMI_TRIES 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * speedstep_smi_ownership
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int speedstep_smi_ownership(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u32 command, result, magic, dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u32 function = GET_SPEEDSTEP_OWNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned char magic_data[] = "Copyright (c) 1999 Intel Corporation";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) magic = virt_to_phys(magic_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pr_debug("trying to obtain ownership with command %x at port %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) command, smi_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) "push %%ebp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) "out %%al, (%%dx)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) "pop %%ebp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) : "=D" (result),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "=S" (dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) : "a" (command), "b" (function), "c" (0), "d" (smi_port),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) "D" (0), "S" (magic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) : "memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pr_debug("result is %x\n", result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * speedstep_smi_get_freqs - get SpeedStep preferred & current freq.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @low: the low frequency value is placed here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @high: the high frequency value is placed here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Only available on later SpeedStep-enabled systems, returns false results or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * even hangs [cf. bugme.osdl.org # 1422] on earlier systems. Empirical testing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * shows that the latter occurs if !(ist_info.event & 0xFFFF).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int speedstep_smi_get_freqs(unsigned int *low, unsigned int *high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u32 command, result = 0, edi, high_mhz, low_mhz, dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u32 state = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 function = GET_SPEEDSTEP_FREQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (!(ist_info.event & 0xFFFF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) pr_debug("bug #1422 -- can't read freqs from BIOS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) pr_debug("trying to determine frequencies with command %x at port %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) command, smi_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "push %%ebp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) "out %%al, (%%dx)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) "pop %%ebp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) : "=a" (result),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) "=b" (high_mhz),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) "=c" (low_mhz),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "=d" (state), "=D" (edi), "=S" (dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) : "a" (command),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) "b" (function),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) "c" (state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) "d" (smi_port), "S" (0), "D" (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pr_debug("result %x, low_freq %u, high_freq %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) result, low_mhz, high_mhz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* abort if results are obviously incorrect... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if ((high_mhz + low_mhz) < 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) *high = high_mhz * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *low = low_mhz * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * speedstep_set_state - set the SpeedStep state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static void speedstep_set_state(unsigned int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) unsigned int result = 0, command, new_state, dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned int function = SET_SPEEDSTEP_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) unsigned int retry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (state > 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* Disable IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) pr_debug("trying to set frequency to state %u "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) "with command %x at port %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) state, command, smi_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (retry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * We need to enable interrupts, otherwise the blockage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * won't resolve.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * We disable preemption so that other processes don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * run. If other processes were running, they could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * submit more DMA requests, making the blockage worse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) pr_debug("retry %u, previous result %u, waiting...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) retry, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) mdelay(retry * 50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) retry++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) __asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) "push %%ebp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) "out %%al, (%%dx)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) "pop %%ebp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) : "=b" (new_state), "=D" (result),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) "=c" (dummy), "=a" (dummy),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) "=d" (dummy), "=S" (dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) : "a" (command), "b" (function), "c" (state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) "d" (smi_port), "S" (0), "D" (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) } while ((new_state != state) && (retry <= SMI_TRIES));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* enable IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (new_state == state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) pr_debug("change to %u MHz succeeded after %u tries "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) "with result %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) (speedstep_freqs[new_state].frequency / 1000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) retry, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) pr_err("change to state %u failed with new_state %u and result %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) state, new_state, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * speedstep_target - set a new CPUFreq policy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @policy: new policy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @index: index of new freq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * Sets a new CPUFreq policy/freq.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int speedstep_target(struct cpufreq_policy *policy, unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) speedstep_set_state(index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static int speedstep_cpu_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned int *low, *high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* capability check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (policy->cpu != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) result = speedstep_smi_ownership();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (result) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) pr_debug("fails in acquiring ownership of a SMI interface.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* detect low and high frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) low = &speedstep_freqs[SPEEDSTEP_LOW].frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) high = &speedstep_freqs[SPEEDSTEP_HIGH].frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) result = speedstep_smi_get_freqs(low, high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (result) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* fall back to speedstep_lib.c dection mechanism:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * try both states out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) pr_debug("could not detect low and high frequencies "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) "by SMI call.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) result = speedstep_get_freqs(speedstep_processor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) low, high,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) &speedstep_set_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (result) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) pr_debug("could not detect two different speeds"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) " -- aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) pr_debug("workaround worked.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) policy->freq_table = speedstep_freqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static unsigned int speedstep_get(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return speedstep_get_frequency(speedstep_processor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static int speedstep_resume(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int result = speedstep_smi_ownership();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) pr_debug("fails in re-acquiring ownership of a SMI interface.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static struct cpufreq_driver speedstep_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .name = "speedstep-smi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .verify = cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .target_index = speedstep_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .init = speedstep_cpu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .get = speedstep_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .resume = speedstep_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .attr = cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const struct x86_cpu_id ss_smi_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0x8, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0xb, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) X86_MATCH_VENDOR_FAM_MODEL(INTEL, 15, 0x2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * speedstep_init - initializes the SpeedStep CPUFreq driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * Initializes the SpeedStep support. Returns -ENODEV on unsupported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * BIOS, -EINVAL on problems during initiatization, and zero on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static int __init speedstep_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (!x86_match_cpu(ss_smi_ids))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) speedstep_processor = speedstep_detect_processor();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) switch (speedstep_processor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) case SPEEDSTEP_CPU_PIII_T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) case SPEEDSTEP_CPU_PIII_C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) case SPEEDSTEP_CPU_PIII_C_EARLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) speedstep_processor = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (!speedstep_processor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) pr_debug("No supported Intel CPU detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) pr_debug("signature:0x%.8x, command:0x%.8x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) "event:0x%.8x, perf_level:0x%.8x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) ist_info.signature, ist_info.command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ist_info.event, ist_info.perf_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /* Error if no IST-SMI BIOS or no PARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) sig= 'ISGE' aka 'Intel Speedstep Gate E' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if ((ist_info.signature != 0x47534943) && (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) (smi_port == 0) || (smi_cmd == 0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (smi_sig == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) smi_sig = 0x47534943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) smi_sig = ist_info.signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* setup smi_port from MODLULE_PARM or BIOS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if ((smi_port > 0xff) || (smi_port < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) else if (smi_port == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) smi_port = ist_info.command & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if ((smi_cmd > 0xff) || (smi_cmd < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) else if (smi_cmd == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) smi_cmd = (ist_info.command >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return cpufreq_register_driver(&speedstep_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * speedstep_exit - unregisters SpeedStep support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * Unregisters SpeedStep support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void __exit speedstep_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) cpufreq_unregister_driver(&speedstep_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) module_param_hw(smi_port, int, ioport, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) module_param(smi_cmd, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) module_param(smi_sig, uint, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) "-- Intel's default setting is 0xb2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) "-- Intel's default setting is 0x82");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) "SMI interface.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) MODULE_AUTHOR("Hiroshi Miura");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) MODULE_DESCRIPTION("Speedstep driver for IST applet SMI interface.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) module_init(speedstep_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) module_exit(speedstep_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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