^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * drivers/cpufreq/spear-cpufreq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * CPU Frequency Scaling for SPEAr platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012 ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Deepak Sikri <deepak.sikri@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* SPEAr CPUFreq driver data structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned int transition_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct cpufreq_frequency_table *freq_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) } spear_cpufreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct clk *sys_pclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int pclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * In SPEAr1340, cpu clk's parent sys clk can take input from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * following sources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) const char *sys_clk_src[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) "sys_syn_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) "pll1_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) "pll2_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "pll3_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * As sys clk can have multiple source with their own range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * limitation so we choose possible sources accordingly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (newfreq <= 300000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) pclk = 0; /* src is sys_syn_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) else if (newfreq > 300000000 && newfreq <= 500000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) pclk = 3; /* src is pll3_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) else if (newfreq == 600000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) pclk = 1; /* src is pll1_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Get parent to sys clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) sys_pclk = clk_get(NULL, sys_clk_src[pclk]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (IS_ERR(sys_pclk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) pr_err("Failed to get %s clock\n", sys_clk_src[pclk]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return sys_pclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * In SPEAr1340, we cannot use newfreq directly because we need to actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * access a source clock (clk) which might not be ancestor of cpu at present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Hence in SPEAr1340 we would operate on source clock directly before switching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * cpu clock to it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct clk *sys_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) sys_clk = clk_get_parent(spear_cpufreq.clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (IS_ERR(sys_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pr_err("failed to get cpu's parent (sys) clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return PTR_ERR(sys_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Set the rate of the source clock before changing the parent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret = clk_set_rate(sys_pclk, newfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pr_err("Failed to set sys clk rate to %lu\n", newfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ret = clk_set_parent(sys_clk, sys_pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_err("Failed to set sys clk parent\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int spear_cpufreq_target(struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) long newfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct clk *srcclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret, mult = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (of_machine_is_compatible("st,spear1340")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * SPEAr1340 is special in the sense that due to the possibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * of multiple clock sources for cpu clk's parent we can have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * different clock source for different frequency of cpu clk.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Hence we need to choose one from amongst these possible clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * sources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) srcclk = spear1340_cpu_get_possible_parent(newfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (IS_ERR(srcclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) pr_err("Failed to get src clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return PTR_ERR(srcclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* SPEAr1340: src clk is always 2 * intended cpu clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) mult = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * src clock to be altered is ancestor of cpu clock. Hence we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * can directly work on cpu clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) srcclk = spear_cpufreq.clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) newfreq = clk_round_rate(srcclk, newfreq * mult);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (newfreq <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) pr_err("clk_round_rate failed for cpu src clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return newfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (mult == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ret = spear1340_set_cpu_rate(srcclk, newfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret = clk_set_rate(spear_cpufreq.clk, newfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int spear_cpufreq_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) policy->clk = spear_cpufreq.clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) cpufreq_generic_init(policy, spear_cpufreq.freq_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) spear_cpufreq.transition_latency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct cpufreq_driver spear_cpufreq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .name = "cpufreq-spear",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .verify = cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .target_index = spear_cpufreq_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .get = cpufreq_generic_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .init = spear_cpufreq_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .attr = cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int spear_cpufreq_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) const struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct cpufreq_frequency_table *freq_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) const __be32 *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int cnt, i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) np = of_cpu_device_node_get(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) pr_err("No cpu node found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (of_property_read_u32(np, "clock-latency",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) &spear_cpufreq.transition_latency))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) spear_cpufreq.transition_latency = CPUFREQ_ETERNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) prop = of_find_property(np, "cpufreq_tbl", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (!prop || !prop->value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) pr_err("Invalid cpufreq_tbl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) goto out_put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) cnt = prop->length / sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) val = prop->value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) freq_tbl = kcalloc(cnt + 1, sizeof(*freq_tbl), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (!freq_tbl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) goto out_put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) for (i = 0; i < cnt; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) freq_tbl[i].frequency = be32_to_cpup(val++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) freq_tbl[i].frequency = CPUFREQ_TABLE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) spear_cpufreq.freq_tbl = freq_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) spear_cpufreq.clk = clk_get(NULL, "cpu_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (IS_ERR(spear_cpufreq.clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) pr_err("Unable to get CPU clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = PTR_ERR(spear_cpufreq.clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) goto out_put_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = cpufreq_register_driver(&spear_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pr_err("failed register driver: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) clk_put(spear_cpufreq.clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) out_put_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) kfree(freq_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) out_put_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static struct platform_driver spear_cpufreq_platdrv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .name = "spear-cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .probe = spear_cpufreq_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) module_platform_driver(spear_cpufreq_platdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MODULE_DESCRIPTION("SPEAr CPUFreq driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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