Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2007 PA Semi, Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Authors: Egor Martovetsky <egor@pasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *	    Olof Johansson <olof@lixom.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Maintained by: Olof Johansson <olof@lixom.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/hw_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <platforms/pasemi/pasemi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define SDCASR_REG		0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define SDCASR_REG_STRIDE	0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define SDCPWR_CFGA0_REG	0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define SDCPWR_PWST0_REG	0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define SDCPWR_GIZTIME_REG	0x0440
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) /* SDCPWR_GIZTIME_REG fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define SDCPWR_GIZTIME_GR	0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define SDCPWR_GIZTIME_LONGLOCK	0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /* Offset of ASR registers from SDC base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define SDCASR_OFFSET		0x120000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static void __iomem *sdcpwr_mapbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static void __iomem *sdcasr_mapbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /* Current astate, is used when waking up from power savings on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * one core, in case the other core has switched states during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * the idle time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int current_astate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static struct cpufreq_frequency_table pas_freqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	{0, 0,	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	{0, 1,	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{0, 2,	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	{0, 3,	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	{0, 4,	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	{0, 0,	CPUFREQ_TABLE_END},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * hardware specific functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static int get_astate_freq(int astate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u32 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	return ret & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static int get_cur_astate(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u32 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	ret = (ret >> (cpu * 4)) & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int get_gizmo_latency(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u32 giztime, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* just provide the upper bound */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (giztime & SDCPWR_GIZTIME_GR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static void set_astate(int cpu, unsigned int astate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	/* Return if called before init has run */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (unlikely(!sdcasr_mapbase))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int check_astate(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	return get_cur_astate(hard_smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void restore_astate(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	set_astate(cpu, current_astate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  * cpufreq functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct cpufreq_frequency_table *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	const u32 *max_freqp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	u32 max_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	int cur_astate, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct device_node *cpu, *dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	cpu = of_get_cpu_node(policy->cpu, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (!cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	max_freqp = of_get_property(cpu, "clock-frequency", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	of_node_put(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (!max_freqp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	/* we need the freq in kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	max_freq = *max_freqp / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (!dn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		dn = of_find_compatible_node(NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 					     "pasemi,pwrficient-sdc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (!dn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	err = of_address_to_resource(dn, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	of_node_put(dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (!sdcasr_mapbase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (!dn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		dn = of_find_compatible_node(NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 					     "pasemi,pwrficient-gizmo");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	if (!dn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		goto out_unmap_sdcasr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	err = of_address_to_resource(dn, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	of_node_put(dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		goto out_unmap_sdcasr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	sdcpwr_mapbase = ioremap(res.start, 0x1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (!sdcpwr_mapbase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		goto out_unmap_sdcasr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	pr_debug("init cpufreq on CPU %d\n", policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	pr_debug("initializing frequency table\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	/* initialize frequency table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	cpufreq_for_each_entry_idx(pos, pas_freqs, idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		pos->frequency = get_astate_freq(pos->driver_data) * 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		pr_debug("%d: %d\n", idx, pos->frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	cur_astate = get_cur_astate(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	pr_debug("current astate is at %d\n",cur_astate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	policy->cur = pas_freqs[cur_astate].frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	ppc_proc_freq = policy->cur * 1000ul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) out_unmap_sdcasr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	iounmap(sdcasr_mapbase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	 * We don't support CPU hotplug. Don't unmap after the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	 * has already made it to a running state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (system_state >= SYSTEM_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (sdcasr_mapbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		iounmap(sdcasr_mapbase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (sdcpwr_mapbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		iounmap(sdcpwr_mapbase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int pas_cpufreq_target(struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			      unsigned int pas_astate_new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		 policy->cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		 pas_freqs[pas_astate_new].frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		 pas_freqs[pas_astate_new].driver_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	current_astate = pas_astate_new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	for_each_online_cpu(i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		set_astate(i, pas_astate_new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	ppc_proc_freq = pas_freqs[pas_astate_new].frequency * 1000ul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static struct cpufreq_driver pas_cpufreq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.name		= "pas-cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	.flags		= CPUFREQ_CONST_LOOPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	.init		= pas_cpufreq_cpu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	.exit		= pas_cpufreq_cpu_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.verify		= cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	.target_index	= pas_cpufreq_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.attr		= cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)  * module init and destoy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static int __init pas_cpufreq_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (!of_machine_is_compatible("PA6T-1682M") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	    !of_machine_is_compatible("pasemi,pwrficient"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	return cpufreq_register_driver(&pas_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static void __exit pas_cpufreq_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	cpufreq_unregister_driver(&pas_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) module_init(pas_cpufreq_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) module_exit(pas_cpufreq_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");