Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * CPU Frequency Scaling for Loongson 1 SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2014-2016 Zhang, Keguang <keguang.zhang@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <loongson1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct ls1x_cpufreq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct clk *clk;	/* CPU clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct clk *mux_clk;	/* MUX of CPU clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct clk *pll_clk;	/* PLL clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct clk *osc_clk;	/* OSC clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	unsigned int max_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	unsigned int min_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static struct ls1x_cpufreq *cpufreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static int ls1x_cpufreq_notifier(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 				 unsigned long val, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if (val == CPUFREQ_POSTCHANGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		current_cpu_data.udelay_val = loops_per_jiffy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return NOTIFY_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static struct notifier_block ls1x_cpufreq_notifier_block = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	.notifier_call = ls1x_cpufreq_notifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int ls1x_cpufreq_target(struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			       unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct device *cpu_dev = get_cpu_device(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	unsigned int old_freq, new_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	old_freq = policy->cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	new_freq = policy->freq_table[index].frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	 * The procedure of reconfiguring CPU clk is as below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	 *  - Reparent CPU clk to OSC clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	 *  - Reset CPU clock (very important)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	 *  - Reconfigure CPU DIV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	 *  - Reparent CPU clk back to CPU DIV clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	clk_set_parent(policy->clk, cpufreq->osc_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) | RST_CPU_EN | RST_CPU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		     LS1X_CLK_PLL_DIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN | RST_CPU),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		     LS1X_CLK_PLL_DIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	clk_set_rate(cpufreq->mux_clk, new_freq * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	clk_set_parent(policy->clk, cpufreq->mux_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	dev_dbg(cpu_dev, "%u KHz --> %u KHz\n", old_freq, new_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static int ls1x_cpufreq_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct device *cpu_dev = get_cpu_device(policy->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct cpufreq_frequency_table *freq_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	unsigned int pll_freq, freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	int steps, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	pll_freq = clk_get_rate(cpufreq->pll_clk) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	steps = 1 << DIV_CPU_WIDTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	freq_tbl = kcalloc(steps, sizeof(*freq_tbl), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (!freq_tbl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	for (i = 0; i < (steps - 1); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		freq = pll_freq / (i + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		if ((freq < cpufreq->min_freq) || (freq > cpufreq->max_freq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			freq_tbl[i].frequency = CPUFREQ_ENTRY_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			freq_tbl[i].frequency = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		dev_dbg(cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			"cpufreq table: index %d: frequency %d\n", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			freq_tbl[i].frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	freq_tbl[i].frequency = CPUFREQ_TABLE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	policy->clk = cpufreq->clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	cpufreq_generic_init(policy, freq_tbl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int ls1x_cpufreq_exit(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	kfree(policy->freq_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct cpufreq_driver ls1x_cpufreq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	.name		= "cpufreq-ls1x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	.flags		= CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.verify		= cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	.target_index	= ls1x_cpufreq_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.get		= cpufreq_generic_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	.init		= ls1x_cpufreq_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	.exit		= ls1x_cpufreq_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	.attr		= cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int ls1x_cpufreq_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	cpufreq_unregister_notifier(&ls1x_cpufreq_notifier_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 				    CPUFREQ_TRANSITION_NOTIFIER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	cpufreq_unregister_driver(&ls1x_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int ls1x_cpufreq_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct plat_ls1x_cpufreq *pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (!pdata || !pdata->clk_name || !pdata->osc_clk_name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		dev_err(&pdev->dev, "platform data missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	cpufreq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	    devm_kzalloc(&pdev->dev, sizeof(struct ls1x_cpufreq), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (!cpufreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	cpufreq->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	clk = devm_clk_get(&pdev->dev, pdata->clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		dev_err(&pdev->dev, "unable to get %s clock\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			pdata->clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	cpufreq->clk = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	clk = clk_get_parent(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		dev_err(&pdev->dev, "unable to get parent of %s clock\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			__clk_get_name(cpufreq->clk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	cpufreq->mux_clk = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	clk = clk_get_parent(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		dev_err(&pdev->dev, "unable to get parent of %s clock\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			__clk_get_name(cpufreq->mux_clk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	cpufreq->pll_clk = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	clk = devm_clk_get(&pdev->dev, pdata->osc_clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		dev_err(&pdev->dev, "unable to get %s clock\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			pdata->osc_clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	cpufreq->osc_clk = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	cpufreq->max_freq = pdata->max_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	cpufreq->min_freq = pdata->min_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	ret = cpufreq_register_driver(&ls1x_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			"failed to register CPUFreq driver: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	ret = cpufreq_register_notifier(&ls1x_cpufreq_notifier_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 					CPUFREQ_TRANSITION_NOTIFIER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			"failed to register CPUFreq notifier: %d\n",ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		cpufreq_unregister_driver(&ls1x_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static struct platform_driver ls1x_cpufreq_platdrv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.probe	= ls1x_cpufreq_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.remove	= ls1x_cpufreq_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		.name	= "ls1x-cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) module_platform_driver(ls1x_cpufreq_platdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MODULE_ALIAS("platform:ls1x-cpufreq");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_DESCRIPTION("Loongson1 CPUFreq driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MODULE_LICENSE("GPL");