^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/proc-fns.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CPU_SW_INT_BLK BIT(28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static struct priv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct clk *cpu_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct clk *ddr_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct clk *powersave_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) } priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define STATE_CPU_FREQ 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define STATE_DDR_FREQ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Kirkwood can swap the clock to the CPU between two clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * - cpu clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * - ddr clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * The frequencies are set at runtime before registering this table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct cpufreq_frequency_table kirkwood_freq_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {0, STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {0, STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {0, 0, CPUFREQ_TABLE_END},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return clk_get_rate(priv.powersave_clk) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned int state = kirkwood_freq_table[index].driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Disable interrupts to the CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) reg = readl_relaxed(priv.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) reg |= CPU_SW_INT_BLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) writel_relaxed(reg, priv.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case STATE_CPU_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) clk_set_parent(priv.powersave_clk, priv.cpu_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) case STATE_DDR_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) clk_set_parent(priv.powersave_clk, priv.ddr_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Wait-for-Interrupt, while the hardware changes frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) cpu_do_idle();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Enable interrupts to the CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) reg = readl_relaxed(priv.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) reg &= ~CPU_SW_INT_BLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) writel_relaxed(reg, priv.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* Module init and exit code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static struct cpufreq_driver kirkwood_cpufreq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .get = kirkwood_cpufreq_get_cpu_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .verify = cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .target_index = kirkwood_cpufreq_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .init = kirkwood_cpufreq_cpu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .name = "kirkwood-cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .attr = cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int kirkwood_cpufreq_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) priv.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) priv.base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (IS_ERR(priv.base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return PTR_ERR(priv.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) np = of_cpu_device_node_get(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dev_err(&pdev->dev, "failed to get cpu device node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (IS_ERR(priv.cpu_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_err(priv.dev, "Unable to get cpuclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) err = PTR_ERR(priv.cpu_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) goto out_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) err = clk_prepare_enable(priv.cpu_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) dev_err(priv.dev, "Unable to prepare cpuclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) goto out_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (IS_ERR(priv.ddr_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_err(priv.dev, "Unable to get ddrclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) err = PTR_ERR(priv.ddr_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) goto out_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) err = clk_prepare_enable(priv.ddr_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dev_err(priv.dev, "Unable to prepare ddrclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) goto out_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) priv.powersave_clk = of_clk_get_by_name(np, "powersave");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (IS_ERR(priv.powersave_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_err(priv.dev, "Unable to get powersave\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) err = PTR_ERR(priv.powersave_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) goto out_ddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) err = clk_prepare_enable(priv.powersave_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) dev_err(priv.dev, "Unable to prepare powersave clk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) goto out_ddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dev_err(priv.dev, "Failed to register cpufreq driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) goto out_powersave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) out_powersave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) clk_disable_unprepare(priv.powersave_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) out_ddr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) clk_disable_unprepare(priv.ddr_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) out_cpu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) clk_disable_unprepare(priv.cpu_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) out_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int kirkwood_cpufreq_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) clk_disable_unprepare(priv.powersave_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) clk_disable_unprepare(priv.ddr_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) clk_disable_unprepare(priv.cpu_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static struct platform_driver kirkwood_cpufreq_platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .probe = kirkwood_cpufreq_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .remove = kirkwood_cpufreq_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .name = "kirkwood-cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) module_platform_driver(kirkwood_cpufreq_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MODULE_ALIAS("platform:kirkwood-cpufreq");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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