^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2012 Calxeda, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This driver provides the clk notifier callbacks that are used when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * the cpufreq-dt driver changes to frequency to alert the highbank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * EnergyCore Management Engine (ECME) about the need to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * voltage. The ECME interfaces with the actual voltage regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pl320-ipc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define HB_CPUFREQ_CHANGE_NOTE 0x80000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define HB_CPUFREQ_IPC_LEN 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HB_CPUFREQ_VOLT_RETRIES 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int hb_voltage_change(unsigned int freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u32 msg[HB_CPUFREQ_IPC_LEN] = {HB_CPUFREQ_CHANGE_NOTE, freq / 1000000};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return pl320_ipc_transmit(msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int hb_cpufreq_clk_notify(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned long action, void *hclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct clk_notifier_data *clk_data = hclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (action == PRE_RATE_CHANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (clk_data->new_rate > clk_data->old_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) while (hb_voltage_change(clk_data->new_rate))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (i++ > HB_CPUFREQ_VOLT_RETRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return NOTIFY_BAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) } else if (action == POST_RATE_CHANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (clk_data->new_rate < clk_data->old_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) while (hb_voltage_change(clk_data->new_rate))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (i++ > HB_CPUFREQ_VOLT_RETRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return NOTIFY_BAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static struct notifier_block hb_cpufreq_clk_nb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .notifier_call = hb_cpufreq_clk_notify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int hb_cpufreq_driver_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct platform_device_info devinfo = { .name = "cpufreq-dt", };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct clk *cpu_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if ((!of_machine_is_compatible("calxeda,highbank")) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) (!of_machine_is_compatible("calxeda,ecx-2000")))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) cpu_dev = get_cpu_device(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (!cpu_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) pr_err("failed to get highbank cpufreq device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) np = of_node_get(cpu_dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) pr_err("failed to find highbank cpufreq node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) cpu_clk = clk_get(cpu_dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (IS_ERR(cpu_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = PTR_ERR(cpu_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pr_err("failed to get cpu0 clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) goto out_put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ret = clk_notifier_register(cpu_clk, &hb_cpufreq_clk_nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pr_err("failed to register clk notifier: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) goto out_put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Instantiate cpufreq-dt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) platform_device_register_full(&devinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) out_put_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) module_init(hb_cpufreq_driver_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const struct of_device_id __maybe_unused hb_cpufreq_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { .compatible = "calxeda,highbank" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { .compatible = "calxeda,ecx-2000" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MODULE_DEVICE_TABLE(of, hb_cpufreq_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@calxeda.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MODULE_DESCRIPTION("Calxeda Highbank cpufreq driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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