Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Based on documentation provided by Dave Jones. Thanks!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/cpu_device_id.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/msr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/tsc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <acpi/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define EPS_BRAND_C7M	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define EPS_BRAND_C7	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define EPS_BRAND_EDEN	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define EPS_BRAND_C3	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define EPS_BRAND_C7D	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) struct eps_cpu_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32 fsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u32 bios_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct cpufreq_frequency_table freq_table[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static struct eps_cpu_data *eps_cpu[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* Module parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static int freq_failsafe_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int voltage_failsafe_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static int set_max_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static int ignore_acpi_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static struct acpi_processor_performance *eps_acpi_cpu_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /* Minimum necessary to get acpi_processor_get_bios_limit() working */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static int eps_acpi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	eps_acpi_cpu_perf = kzalloc(sizeof(*eps_acpi_cpu_perf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 				      GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (!eps_acpi_cpu_perf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 								GFP_KERNEL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		kfree(eps_acpi_cpu_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		eps_acpi_cpu_perf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		kfree(eps_acpi_cpu_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		eps_acpi_cpu_perf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static int eps_acpi_exit(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	if (eps_acpi_cpu_perf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		acpi_processor_unregister_performance(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		kfree(eps_acpi_cpu_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		eps_acpi_cpu_perf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static unsigned int eps_get(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct eps_cpu_data *centaur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	u32 lo, hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	centaur = eps_cpu[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (centaur == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* Return current frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	return centaur->fsb * ((lo >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int eps_set_state(struct eps_cpu_data *centaur,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			 struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			 u32 dest_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	u32 lo, hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	/* Wait while CPU is busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	while (lo & ((1 << 16) | (1 << 17))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		udelay(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		if (unlikely(i > 64)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	/* Set new multiplier and voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	/* Wait until transition end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		udelay(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		if (unlikely(i > 64)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	} while (lo & ((1 << 16) | (1 << 17)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	u8 current_multiplier, current_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	/* Print voltage and multiplier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	current_voltage = lo & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	current_multiplier = (lo >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	pr_info("Current multiplier = %d\n", current_multiplier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int eps_target(struct cpufreq_policy *policy, unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct eps_cpu_data *centaur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	unsigned int cpu = policy->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	unsigned int dest_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (unlikely(eps_cpu[cpu] == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	centaur = eps_cpu[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	/* Make frequency transition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	dest_state = centaur->freq_table[index].driver_data & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	ret = eps_set_state(centaur, policy, dest_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		pr_err("Timeout!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int eps_cpu_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	u32 lo, hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	u64 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	u8 current_multiplier, current_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	u8 max_multiplier, max_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	u8 min_multiplier, min_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	u8 brand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	u32 fsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct eps_cpu_data *centaur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct cpuinfo_x86 *c = &cpu_data(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct cpufreq_frequency_table *f_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	int k, step, voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	int states;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	unsigned int limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (policy->cpu != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	/* Check brand */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	pr_info("Detected VIA ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	switch (c->x86_model) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	case 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		rdmsr(0x1153, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		brand = (((lo >> 2) ^ lo) >> 18) & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		pr_cont("Model A ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	case 13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		rdmsr(0x1154, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		pr_cont("Model D ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	switch (brand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	case EPS_BRAND_C7M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		pr_cont("C7-M\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	case EPS_BRAND_C7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		pr_cont("C7\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	case EPS_BRAND_EDEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		pr_cont("Eden\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	case EPS_BRAND_C7D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		pr_cont("C7-D\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	case EPS_BRAND_C3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		pr_cont("C3\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	/* Enable Enhanced PowerSaver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	rdmsrl(MSR_IA32_MISC_ENABLE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		wrmsrl(MSR_IA32_MISC_ENABLE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		/* Can be locked at 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		rdmsrl(MSR_IA32_MISC_ENABLE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			pr_info("Can't enable Enhanced PowerSaver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	/* Print voltage and multiplier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	current_voltage = lo & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	current_multiplier = (lo >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	pr_info("Current multiplier = %d\n", current_multiplier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	/* Print limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	max_voltage = hi & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	pr_info("Highest voltage = %dmV\n", max_voltage * 16 + 700);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	max_multiplier = (hi >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	pr_info("Highest multiplier = %d\n", max_multiplier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	min_voltage = (hi >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	pr_info("Lowest voltage = %dmV\n", min_voltage * 16 + 700);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	min_multiplier = (hi >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	pr_info("Lowest multiplier = %d\n", min_multiplier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	/* Sanity checks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (current_multiplier == 0 || max_multiplier == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	    || min_multiplier == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	if (current_multiplier > max_multiplier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	    || max_multiplier <= min_multiplier)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (current_voltage > 0x1f || max_voltage > 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (max_voltage < min_voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	    || current_voltage < min_voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	    || current_voltage > max_voltage)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	/* Check for systems using underclocked CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	if (!freq_failsafe_off && max_multiplier != current_multiplier) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		pr_info("Your processor is running at different frequency then its maximum. Aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		pr_info("You can use freq_failsafe_off option to disable this check.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (!voltage_failsafe_off && max_voltage != current_voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		pr_info("Your processor is running at different voltage then its maximum. Aborting.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		pr_info("You can use voltage_failsafe_off option to disable this check.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	/* Calc FSB speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	fsb = cpu_khz / current_multiplier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	/* Check for ACPI processor speed limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (!ignore_acpi_limit && !eps_acpi_init()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			pr_info("ACPI limit %u.%uGHz\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 				limit/1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 				(limit%1000000)/10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			eps_acpi_exit(policy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			/* Check if max_multiplier is in BIOS limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			if (limit && max_multiplier * fsb > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 				pr_info("Aborting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	/* Allow user to set lower maximum voltage then that reported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	 * by processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (brand == EPS_BRAND_C7M && set_max_voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		/* Change mV to something hardware can use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		v = (set_max_voltage - 700) / 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		/* Check if voltage is within limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		if (v >= min_voltage && v <= max_voltage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 			pr_info("Setting %dmV as maximum\n", v * 16 + 700);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 			max_voltage = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	/* Calc number of p-states supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	if (brand == EPS_BRAND_C7M)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		states = max_multiplier - min_multiplier + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		states = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	/* Allocate private data and frequency table for current cpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	centaur = kzalloc(struct_size(centaur, freq_table, states + 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 			  GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	if (!centaur)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	eps_cpu[0] = centaur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	/* Copy basic values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	centaur->fsb = fsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	centaur->bios_limit = limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	/* Fill frequency and MSR value table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	f_table = &centaur->freq_table[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (brand != EPS_BRAND_C7M) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		f_table[0].frequency = fsb * min_multiplier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		f_table[0].driver_data = (min_multiplier << 8) | min_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		f_table[1].frequency = fsb * max_multiplier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		f_table[1].driver_data = (max_multiplier << 8) | max_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		f_table[2].frequency = CPUFREQ_TABLE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		k = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		step = ((max_voltage - min_voltage) * 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			/ (max_multiplier - min_multiplier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		for (i = min_multiplier; i <= max_multiplier; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			voltage = (k * step) / 256 + min_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			f_table[k].frequency = fsb * i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 			f_table[k].driver_data = (i << 8) | voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 			k++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		f_table[k].frequency = CPUFREQ_TABLE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	policy->freq_table = &centaur->freq_table[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static int eps_cpu_exit(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	unsigned int cpu = policy->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	/* Bye */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	kfree(eps_cpu[cpu]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	eps_cpu[cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static struct cpufreq_driver eps_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	.verify		= cpufreq_generic_frequency_table_verify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	.target_index	= eps_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	.init		= eps_cpu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	.exit		= eps_cpu_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	.get		= eps_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	.name		= "e_powersaver",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	.attr		= cpufreq_generic_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /* This driver will work only on Centaur C7 processors with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)  * Enhanced SpeedStep/PowerSaver registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static const struct x86_cpu_id eps_cpu_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_EST, NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) MODULE_DEVICE_TABLE(x86cpu, eps_cpu_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static int __init eps_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	if (!x86_match_cpu(eps_cpu_id) || boot_cpu_data.x86_model < 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	if (cpufreq_register_driver(&eps_driver))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static void __exit eps_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	cpufreq_unregister_driver(&eps_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* Allow user to overclock his machine or to change frequency to higher after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)  * unloading module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) module_param(freq_failsafe_off, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) module_param(voltage_failsafe_off, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) module_param(ignore_acpi_limit, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) module_param(set_max_voltage, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) module_init(eps_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) module_exit(eps_exit);