^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * CPPC (Collaborative Processor Performance Control) driver for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * interfacing with the CPUfreq layer and governors. See
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * cppc_acpi.c for CPPC specific methods.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (C) Copyright 2014, 2015 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define pr_fmt(fmt) "CPPC Cpufreq:" fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/dmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <acpi/cppc_acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Minimum struct length needed for the DMI processor entry we want */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Offest in the DMI processor structure for the max frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DMI_PROCESSOR_MAX_SPEED 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * These structs contain information parsed from per CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * ACPI _CPC structures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * e.g. For each CPU the highest, lowest supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * performance capabilities, desired performance level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * requested etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct cppc_cpudata **all_cpu_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static bool boost_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct cppc_workaround_oem_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) char oem_id[ACPI_OEM_ID_SIZE + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 oem_revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static struct cppc_workaround_oem_info wa_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .oem_id = "HISI ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .oem_table_id = "HIP07 ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .oem_revision = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .oem_id = "HISI ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .oem_table_id = "HIP08 ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .oem_revision = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Callback function used to retrieve the max frequency from DMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) const u8 *dmi_data = (const u8 *)dm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u16 *mhz = (u16 *)private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (dm->type == DMI_ENTRY_PROCESSOR &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u16 val = (u16)get_unaligned((const u16 *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) (dmi_data + DMI_PROCESSOR_MAX_SPEED));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) *mhz = val > *mhz ? val : *mhz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Look up the max frequency in DMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static u64 cppc_get_dmi_max_khz(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u16 mhz = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dmi_walk(cppc_find_dmi_mhz, &mhz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * Real stupid fallback value, just in case there is no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * actual value set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) mhz = mhz ? mhz : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return (1000 * mhz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * If CPPC lowest_freq and nominal_freq registers are exposed then we can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * use them to convert perf to freq and vice versa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * If the perf/freq point lies between Nominal and Lowest, we can treat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * (Low perf, Low freq) and (Nom Perf, Nom freq) as 2D co-ordinates of a line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * and extrapolate the rest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * For perf/freq > Nominal, we use the ratio perf:freq at Nominal for conversion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned int perf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static u64 max_khz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct cppc_perf_caps *caps = &cpu->perf_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u64 mul, div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (caps->lowest_freq && caps->nominal_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (perf >= caps->nominal_perf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) mul = caps->nominal_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) div = caps->nominal_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) mul = caps->nominal_freq - caps->lowest_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) div = caps->nominal_perf - caps->lowest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (!max_khz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) max_khz = cppc_get_dmi_max_khz();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) mul = max_khz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) div = caps->highest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return (u64)perf * mul / div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static unsigned int cppc_cpufreq_khz_to_perf(struct cppc_cpudata *cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static u64 max_khz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct cppc_perf_caps *caps = &cpu->perf_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u64 mul, div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (caps->lowest_freq && caps->nominal_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (freq >= caps->nominal_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) mul = caps->nominal_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) div = caps->nominal_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) mul = caps->lowest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) div = caps->lowest_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!max_khz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) max_khz = cppc_get_dmi_max_khz();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) mul = caps->highest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) div = max_khz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return (u64)freq * mul / div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned int target_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) unsigned int relation)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct cppc_cpudata *cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct cpufreq_freqs freqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u32 desired_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) cpu = all_cpu_data[policy->cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) desired_perf = cppc_cpufreq_khz_to_perf(cpu, target_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Return if it is exactly the same perf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (desired_perf == cpu->perf_ctrls.desired_perf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) cpu->perf_ctrls.desired_perf = desired_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) freqs.old = policy->cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) freqs.new = target_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) cpufreq_freq_transition_begin(policy, &freqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) cpufreq_freq_transition_end(policy, &freqs, ret != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) pr_debug("Failed to set target on CPU:%d. ret:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) cpu->cpu, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int cppc_verify_policy(struct cpufreq_policy_data *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) cpufreq_verify_within_cpu_limits(policy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int cpu_num = policy->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct cppc_cpudata *cpu = all_cpu_data[cpu_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) cpu->perf_caps.lowest_perf, cpu_num, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * The PCC subspace describes the rate at which platform can accept commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * on the shared PCC channel (including READs which do not count towards freq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * trasition requests), so ideally we need to use the PCC values as a fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * if we don't have a platform specific transition_delay_us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #ifdef CONFIG_ARM64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #include <asm/cputype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) unsigned long implementor = read_cpuid_implementor();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned long part_num = read_cpuid_part_number();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned int delay_us = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) switch (implementor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) case ARM_CPU_IMP_QCOM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) switch (part_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) case QCOM_CPU_PART_FALKOR_V1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) case QCOM_CPU_PART_FALKOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) delay_us = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return delay_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct cppc_cpudata *cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned int cpu_num = policy->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) cpu = all_cpu_data[policy->cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) cpu->cpu = cpu_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) pr_debug("Err reading CPU%d perf capabilities. ret:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) cpu_num, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /* Convert the lowest and nominal freq from MHz to KHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) cpu->perf_caps.lowest_freq *= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) cpu->perf_caps.nominal_freq *= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * Set min to lowest nonlinear perf to avoid any efficiency penalty (see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * Section 8.4.7.1.1.5 of ACPI 6.1 spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) policy->min = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.lowest_nonlinear_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) policy->max = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.nominal_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * Set cpuinfo.min_freq to Lowest to make the full range of performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * available if userspace wants to use any perf between lowest & lowest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * nonlinear perf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) policy->cpuinfo.min_freq = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.lowest_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) policy->cpuinfo.max_freq = cppc_cpufreq_perf_to_khz(cpu, cpu->perf_caps.nominal_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) policy->shared_type = cpu->shared_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) cpumask_copy(policy->cpus, cpu->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) for_each_cpu(i, policy->cpus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (unlikely(i == policy->cpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) sizeof(cpu->perf_caps));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) } else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Support only SW_ANY for now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) pr_debug("Unsupported CPU co-ord type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) cpu->cur_policy = policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * If 'highest_perf' is greater than 'nominal_perf', we assume CPU Boost
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (cpu->perf_caps.highest_perf > cpu->perf_caps.nominal_perf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) boost_supported = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Set policy->cur to max now. The governors will adjust later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) policy->cur = cppc_cpufreq_perf_to_khz(cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) cpu->perf_caps.highest_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) cpu->perf_ctrls.desired_perf = cpu->perf_caps.highest_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) cpu->perf_caps.highest_perf, cpu_num, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static inline u64 get_delta(u64 t1, u64 t0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (t1 > t0 || t0 > ~(u32)0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return t1 - t0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return (u32)t1 - (u32)t0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) struct cppc_perf_fb_ctrs fb_ctrs_t0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct cppc_perf_fb_ctrs fb_ctrs_t1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) u64 delta_reference, delta_delivered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) u64 reference_perf, delivered_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) reference_perf = fb_ctrs_t0.reference_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) delta_reference = get_delta(fb_ctrs_t1.reference,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) fb_ctrs_t0.reference);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) delta_delivered = get_delta(fb_ctrs_t1.delivered,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) fb_ctrs_t0.delivered);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* Check to avoid divide-by zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (delta_reference || delta_delivered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) delivered_perf = (reference_perf * delta_delivered) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) delta_reference;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) delivered_perf = cpu->perf_ctrls.desired_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return cppc_cpufreq_perf_to_khz(cpu, delivered_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static unsigned int cppc_cpufreq_get_rate(unsigned int cpunum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct cppc_cpudata *cpu = all_cpu_data[cpunum];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) udelay(2); /* 2usec delay between sampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return cppc_get_rate_from_fbctrs(cpu, fb_ctrs_t0, fb_ctrs_t1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct cppc_cpudata *cpudata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (!boost_supported) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) pr_err("BOOST not supported by CPU or firmware\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) cpudata = all_cpu_data[policy->cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) policy->max = cppc_cpufreq_perf_to_khz(cpudata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) cpudata->perf_caps.highest_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) policy->max = cppc_cpufreq_perf_to_khz(cpudata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) cpudata->perf_caps.nominal_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) policy->cpuinfo.max_freq = policy->max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) ret = freq_qos_update_request(policy->max_freq_req, policy->max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static struct cpufreq_driver cppc_cpufreq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .flags = CPUFREQ_CONST_LOOPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .verify = cppc_verify_policy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .target = cppc_cpufreq_set_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .get = cppc_cpufreq_get_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .init = cppc_cpufreq_cpu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .stop_cpu = cppc_cpufreq_stop_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .set_boost = cppc_cpufreq_set_boost,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .name = "cppc_cpufreq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * HISI platform does not support delivered performance counter and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * reference performance counter. It can calculate the performance using the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * platform specific mechanism. We reuse the desired performance register to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * store the real performance calculated by the platform.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpunum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct cppc_cpudata *cpudata = all_cpu_data[cpunum];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) u64 desired_perf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ret = cppc_get_desired_perf(cpunum, &desired_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return cppc_cpufreq_perf_to_khz(cpudata, desired_perf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static void cppc_check_hisi_workaround(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) struct acpi_table_header *tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) acpi_status status = AE_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (ACPI_FAILURE(status) || !tbl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) wa_info[i].oem_revision == tbl->oem_revision) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /* Overwrite the get() callback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) acpi_put_table(tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static int __init cppc_cpufreq_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) struct cppc_cpudata *cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (acpi_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) all_cpu_data = kcalloc(num_possible_cpus(), sizeof(void *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!all_cpu_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) for_each_possible_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) all_cpu_data[i] = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (!all_cpu_data[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) cpu = all_cpu_data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (!zalloc_cpumask_var(&cpu->shared_cpu_map, GFP_KERNEL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) ret = acpi_get_psd_map(all_cpu_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) pr_debug("Error parsing PSD data. Aborting cpufreq registration.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) cppc_check_hisi_workaround();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ret = cpufreq_register_driver(&cppc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) for_each_possible_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) cpu = all_cpu_data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (!cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) free_cpumask_var(cpu->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) kfree(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) kfree(all_cpu_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static void __exit cppc_cpufreq_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct cppc_cpudata *cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) cpufreq_unregister_driver(&cppc_cpufreq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) for_each_possible_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) cpu = all_cpu_data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) free_cpumask_var(cpu->shared_cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) kfree(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) kfree(all_cpu_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) module_exit(cppc_cpufreq_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) MODULE_AUTHOR("Ashwin Chaugule");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) late_initcall(cppc_cpufreq_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static const struct acpi_device_id cppc_acpi_ids[] __used = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {ACPI_PROCESSOR_DEVICE_HID, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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