^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * CPUFreq support for Armada 8K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018 Marvell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Omri Itach <omrii@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Gregory Clement <gregory.clement@bootlin.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pm_opp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Setup the opps list with the divider for the max frequency, that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * will be filled at runtime.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static const int opps_div[] __initconst = {1, 2, 3, 4};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static struct platform_device *armada_8k_pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct freq_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int freq[ARRAY_SIZE(opps_div)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* If the CPUs share the same clock, then they are in the same cluster. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static void __init armada_8k_get_sharing_cpus(struct clk *cur_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct cpumask *cpumask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) cpu_dev = get_cpu_device(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (!cpu_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) pr_warn("Failed to get cpu%d device\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) clk = clk_get(cpu_dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) pr_warn("Cannot get clock for CPU %d\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (clk_is_match(clk, cur_clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) cpumask_set_cpu(cpu, cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int __init armada_8k_add_opp(struct clk *clk, struct device *cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct freq_table *freq_tables,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int opps_index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int cur_frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned int freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Get nominal (current) CPU frequency. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) cur_frequency = clk_get_rate(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (!cur_frequency) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) dev_err(cpu_dev, "Failed to get clock rate for this CPU\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) freq_tables[opps_index].cpu_dev = cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) for (i = 0; i < ARRAY_SIZE(opps_div); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) freq = cur_frequency / opps_div[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ret = dev_pm_opp_add(cpu_dev, freq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) freq_tables[opps_index].freq[i] = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static void armada_8k_cpufreq_free_table(struct freq_table *freq_tables)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int opps_index, nb_cpus = num_possible_cpus();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) for (opps_index = 0 ; opps_index <= nb_cpus; opps_index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* If cpu_dev is NULL then we reached the end of the array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (!freq_tables[opps_index].cpu_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) for (i = 0; i < ARRAY_SIZE(opps_div); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * A 0Hz frequency is not valid, this meant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * that it was not yet initialized so there is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * no more opp to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (freq_tables[opps_index].freq[i] == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dev_pm_opp_remove(freq_tables[opps_index].cpu_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) freq_tables[opps_index].freq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) kfree(freq_tables);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int __init armada_8k_cpufreq_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int ret = 0, opps_index = 0, cpu, nb_cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct freq_table *freq_tables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct cpumask cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) node = of_find_compatible_node(NULL, NULL, "marvell,ap806-cpu-clock");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (!node || !of_device_is_available(node)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) nb_cpus = num_possible_cpus();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) freq_tables = kcalloc(nb_cpus, sizeof(*freq_tables), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!freq_tables)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) cpumask_copy(&cpus, cpu_possible_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * For each CPU, this loop registers the operating points
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * supported (which are the nominal CPU frequency and full integer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * divisions of it).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) for_each_cpu(cpu, &cpus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct cpumask shared_cpus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) cpu_dev = get_cpu_device(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (!cpu_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pr_err("Cannot get CPU %d\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) clk = clk_get(cpu_dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pr_err("Cannot get clock for CPU %d\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) goto remove_opp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ret = armada_8k_add_opp(clk, cpu_dev, freq_tables, opps_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) goto remove_opp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) opps_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) cpumask_clear(&shared_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) armada_8k_get_sharing_cpus(clk, &shared_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dev_pm_opp_set_sharing_cpus(cpu_dev, &shared_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) cpumask_andnot(&cpus, &cpus, &shared_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) armada_8k_pdev = platform_device_register_simple("cpufreq-dt", -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ret = PTR_ERR_OR_ZERO(armada_8k_pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) goto remove_opp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) platform_set_drvdata(armada_8k_pdev, freq_tables);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) remove_opp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) armada_8k_cpufreq_free_table(freq_tables);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) module_init(armada_8k_cpufreq_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static void __exit armada_8k_cpufreq_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct freq_table *freq_tables = platform_get_drvdata(armada_8k_pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) platform_device_unregister(armada_8k_pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) armada_8k_cpufreq_free_table(freq_tables);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) module_exit(armada_8k_cpufreq_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct of_device_id __maybe_unused armada_8k_cpufreq_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { .compatible = "marvell,ap806-cpu-clock" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) MODULE_DEVICE_TABLE(of, armada_8k_cpufreq_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) MODULE_AUTHOR("Gregory Clement <gregory.clement@bootlin.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MODULE_DESCRIPTION("Armada 8K cpufreq driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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