Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #include <linux/sched_clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/printk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) static void __iomem *xtal_in_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static struct delay_timer delay_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static unsigned long notrace read_xtal_counter(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	return readl_relaxed(xtal_in_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static u64 notrace read_sched_clock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	return read_xtal_counter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int __init tango_clocksource_init(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	int xtal_freq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	xtal_in_cnt = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	if (xtal_in_cnt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		pr_err("%pOF: invalid address\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	clk = of_clk_get(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		pr_err("%pOF: invalid clock\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	xtal_freq = clk_get_rate(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	delay_timer.freq = xtal_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	delay_timer.read_current_timer = read_xtal_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 				    32, clocksource_mmio_readl_up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		pr_err("%pOF: registration failed\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	sched_clock_register(read_sched_clock, 32, xtal_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	register_current_timer_delay(&delay_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) TIMER_OF_DECLARE(tango, "sigma,tick-counter", tango_clocksource_init);