^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Marvell Orion SoC timer handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Timer 0 is used as free-running clocksource, while timer 1 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * used as clock_event_device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/sched_clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TIMER_CTRL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define TIMER0_EN BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TIMER0_RELOAD_EN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define TIMER1_EN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define TIMER1_RELOAD_EN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TIMER0_RELOAD 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define TIMER0_VAL 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TIMER1_RELOAD 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TIMER1_VAL 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ORION_ONESHOT_MIN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ORION_ONESHOT_MAX 0xfffffffe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static void __iomem *timer_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static unsigned long notrace orion_read_timer(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return ~readl(timer_base + TIMER0_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static struct delay_timer orion_delay_timer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .read_current_timer = orion_read_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static void orion_delay_timer_init(unsigned long rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) orion_delay_timer.freq = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) register_current_timer_delay(&orion_delay_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Free-running clocksource handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static u64 notrace orion_read_sched_clock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return ~readl(timer_base + TIMER0_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Clockevent handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static u32 ticks_per_jiffy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int orion_clkevt_next_event(unsigned long delta,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct clock_event_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* setup and enable one-shot timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) writel(delta, timer_base + TIMER1_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) atomic_io_modify(timer_base + TIMER_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) TIMER1_RELOAD_EN | TIMER1_EN, TIMER1_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int orion_clkevt_shutdown(struct clock_event_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* disable timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) atomic_io_modify(timer_base + TIMER_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) TIMER1_RELOAD_EN | TIMER1_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int orion_clkevt_set_periodic(struct clock_event_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* setup and enable periodic timer at 1/HZ intervals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) atomic_io_modify(timer_base + TIMER_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) TIMER1_RELOAD_EN | TIMER1_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) TIMER1_RELOAD_EN | TIMER1_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct clock_event_device orion_clkevt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = "orion_event",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .features = CLOCK_EVT_FEAT_ONESHOT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) CLOCK_EVT_FEAT_PERIODIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .shift = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .rating = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .set_next_event = orion_clkevt_next_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .set_state_shutdown = orion_clkevt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .set_state_periodic = orion_clkevt_set_periodic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .set_state_oneshot = orion_clkevt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .tick_resume = orion_clkevt_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static irqreturn_t orion_clkevt_irq_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) orion_clkevt.event_handler(&orion_clkevt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int __init orion_timer_init(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned long rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* timer registers are shared with watchdog timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) timer_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (!timer_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) pr_err("%pOFn: unable to map resource\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) clk = of_clk_get(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) pr_err("%pOFn: unable to get clk\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = clk_prepare_enable(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) pr_err("Failed to prepare clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* we are only interested in timer1 irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) irq = irq_of_parse_and_map(np, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (irq <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) pr_err("%pOFn: unable to parse timer1 irq\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) goto out_unprep_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) rate = clk_get_rate(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* setup timer0 as free-running clocksource */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) writel(~0, timer_base + TIMER0_VAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) writel(~0, timer_base + TIMER0_RELOAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) atomic_io_modify(timer_base + TIMER_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) TIMER0_RELOAD_EN | TIMER0_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) TIMER0_RELOAD_EN | TIMER0_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ret = clocksource_mmio_init(timer_base + TIMER0_VAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) "orion_clocksource", rate, 300, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) clocksource_mmio_readl_down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pr_err("Failed to initialize mmio timer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) goto out_unprep_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) sched_clock_register(orion_read_sched_clock, 32, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* setup timer1 as clockevent timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ret = request_irq(irq, orion_clkevt_irq_handler, IRQF_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) "orion_event", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) pr_err("%pOFn: unable to setup irq\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) goto out_unprep_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) orion_clkevt.cpumask = cpumask_of(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) orion_clkevt.irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) clockevents_config_and_register(&orion_clkevt, rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ORION_ONESHOT_MIN, ORION_ONESHOT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) orion_delay_timer_init(rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) out_unprep_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) clk_disable_unprepare(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) TIMER_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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