Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/sched_clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <asm/reg_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "timer-of.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define PTIM_CCVR	"cr<3, 14>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define PTIM_CTLR	"cr<0, 14>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define PTIM_LVR	"cr<6, 14>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define PTIM_TSR	"cr<1, 14>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) static int csky_mptimer_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static int csky_mptimer_set_next_event(unsigned long delta,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 				       struct clock_event_device *ce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	mtcr(PTIM_LVR, delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static int csky_mptimer_shutdown(struct clock_event_device *ce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	mtcr(PTIM_CTLR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static int csky_mptimer_oneshot(struct clock_event_device *ce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	mtcr(PTIM_CTLR, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static int csky_mptimer_oneshot_stopped(struct clock_event_device *ce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	mtcr(PTIM_CTLR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static DEFINE_PER_CPU(struct timer_of, csky_to) = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.flags					= TIMER_OF_CLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.clkevt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.rating				= 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		.features			= CLOCK_EVT_FEAT_PERCPU |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 						  CLOCK_EVT_FEAT_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.set_state_shutdown		= csky_mptimer_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.set_state_oneshot		= csky_mptimer_oneshot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.set_state_oneshot_stopped	= csky_mptimer_oneshot_stopped,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.set_next_event			= csky_mptimer_set_next_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static irqreturn_t csky_timer_interrupt(int irq, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct timer_of *to = this_cpu_ptr(&csky_to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	mtcr(PTIM_TSR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	to->clkevt.event_handler(&to->clkevt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  * clock event for percpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static int csky_mptimer_starting_cpu(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct timer_of *to = per_cpu_ptr(&csky_to, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	to->clkevt.cpumask = cpumask_of(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	enable_percpu_irq(csky_mptimer_irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	clockevents_config_and_register(&to->clkevt, timer_of_rate(to),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 					2, ULONG_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int csky_mptimer_dying_cpu(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	disable_percpu_irq(csky_mptimer_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  * clock source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static u64 notrace sched_clock_read(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return (u64)mfcr(PTIM_CCVR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static u64 clksrc_read(struct clocksource *c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return (u64)mfcr(PTIM_CCVR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct clocksource csky_clocksource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.name	= "csky",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	.rating	= 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	.mask	= CLOCKSOURCE_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	.read	= clksrc_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int __init csky_mptimer_init(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	int ret, cpu, cpu_rollback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct timer_of *to = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	 * Csky_mptimer is designed for C-SKY SMP multi-processors and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 * every core has it's own private irq and regs for clkevt and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	 * clksrc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 * The regs is accessed by cpu instruction: mfcr/mtcr instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	 * mmio map style. So we needn't mmio-address in dts, but we still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	 * need to give clk and irq number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	 * We use private irq for the mptimer and irq number is the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	 * for every core. So we use request_percpu_irq() in timer_of_init.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	csky_mptimer_irq = irq_of_parse_and_map(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (csky_mptimer_irq <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	ret = request_percpu_irq(csky_mptimer_irq, csky_timer_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 				 "csky_mp_timer", &csky_to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		to = per_cpu_ptr(&csky_to, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		ret = timer_of_init(np, to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			goto rollback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	clocksource_register_hz(&csky_clocksource, timer_of_rate(to));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	sched_clock_register(sched_clock_read, 32, timer_of_rate(to));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	ret = cpuhp_setup_state(CPUHP_AP_CSKY_TIMER_STARTING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				"clockevents/csky/timer:starting",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 				csky_mptimer_starting_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 				csky_mptimer_dying_cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) rollback:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	for_each_possible_cpu(cpu_rollback) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		if (cpu_rollback == cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		to = per_cpu_ptr(&csky_to, cpu_rollback);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		timer_of_cleanup(to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) TIMER_OF_DECLARE(csky_mptimer, "csky,mptimer", csky_mptimer_init);