Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Cirrus Logic CLPS711X clocksource driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/sched_clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	CLPS711X_CLKSRC_CLOCKSOURCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	CLPS711X_CLKSRC_CLOCKEVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static void __iomem *tcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static u64 notrace clps711x_sched_clock_read(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	return ~readw(tcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	unsigned long rate = clk_get_rate(clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	tcd = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	clocksource_mmio_init(tcd, "clps711x-clocksource", rate, 300, 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 			      clocksource_mmio_readw_down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	sched_clock_register(clps711x_sched_clock_read, 16, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct clock_event_device *evt = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	evt->event_handler(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 					unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct clock_event_device *clkevt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	unsigned long rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	if (!clkevt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	rate = clk_get_rate(clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	/* Set Timer prescaler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	writew(DIV_ROUND_CLOSEST(rate, HZ), base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	clkevt->name = "clps711x-clockevent";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	clkevt->rating = 300;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	clkevt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_C3STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	clkevt->cpumask = cpumask_of(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	clockevents_config_and_register(clkevt, HZ, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	return request_irq(irq, clps711x_timer_interrupt, IRQF_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			   "clps711x-timer", clkevt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static int __init clps711x_timer_init(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	unsigned int irq = irq_of_parse_and_map(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct clk *clock = of_clk_get(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	void __iomem *base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (!base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (!irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	if (IS_ERR(clock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		return PTR_ERR(clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	switch (of_alias_get_id(np, "timer")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	case CLPS711X_CLKSRC_CLOCKSOURCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		clps711x_clksrc_init(clock, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case CLPS711X_CLKSRC_CLOCKEVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return _clps711x_clkevt_init(clock, base, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);