^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2012 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define KONA_GPTIMER_STCS_OFFSET 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define KONA_GPTIMER_STCLO_OFFSET 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define KONA_GPTIMER_STCHI_OFFSET 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct kona_bcm_timers {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int tmr_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void __iomem *tmr_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static struct kona_bcm_timers timers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static u32 arch_timer_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * We use the peripheral timers for system tick, the cpu global timer for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * profile tick
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static void kona_timer_disable_and_clear(void __iomem *base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) uint32_t reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * clear and disable interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * We are using compare/match register 0 for our system interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Clear compare (0) interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* disable compare */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) kona_timer_get_counter(void __iomem *timer_base, uint32_t *msw, uint32_t *lsw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int loop_limit = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * Read 64-bit free running counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * 1. Read hi-word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * 2. Read low-word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * 3. Read hi-word again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * 4.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * if new hi-word is not equal to previously read hi-word, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * start from #1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * 4.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * if new hi-word is equal to previously read hi-word then stop.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) } while (--loop_limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (!loop_limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pr_err("bcm_kona_timer: getting counter failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pr_err(" Timer will be impacted\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int kona_timer_set_next_event(unsigned long clc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct clock_event_device *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * timer (0) is disabled by the timer interrupt already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * so, here we reload the next event value and re-enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * the timer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * This way, we are potentially losing the time between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * timer-interrupt->set_next_event. CPU local timers, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * they come in should get rid of skew.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) uint32_t lsw, msw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) uint32_t reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* Load the "next" event tick value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Enable compare */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int kona_timer_shutdown(struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) kona_timer_disable_and_clear(timers.tmr_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct clock_event_device kona_clockevent_timer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .name = "timer 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .features = CLOCK_EVT_FEAT_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .set_next_event = kona_timer_set_next_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .set_state_shutdown = kona_timer_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .tick_resume = kona_timer_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void __init kona_timer_clockevents_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) kona_clockevent_timer.cpumask = cpumask_of(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) clockevents_config_and_register(&kona_clockevent_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) arch_timer_rate, 6, 0xffffffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct clock_event_device *evt = &kona_clockevent_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) kona_timer_disable_and_clear(timers.tmr_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) evt->event_handler(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int __init kona_timer_init(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u32 freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct clk *external_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) external_clk = of_clk_get_by_name(node, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (!IS_ERR(external_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) arch_timer_rate = clk_get_rate(external_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) clk_prepare_enable(external_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) } else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) arch_timer_rate = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) pr_err("Kona Timer v1 unable to determine clock-frequency\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* Setup IRQ numbers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) timers.tmr_irq = irq_of_parse_and_map(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* Setup IO addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) timers.tmr_regs = of_iomap(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) kona_timer_disable_and_clear(timers.tmr_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) kona_timer_clockevents_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (request_irq(timers.tmr_irq, kona_timer_interrupt, IRQF_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) "Kona Timer Tick", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) pr_err("%s: request_irq() failed\n", "Kona Timer Tick");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * bcm,kona-timer is deprecated by brcm,kona-timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * being kept here for driver compatibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags