^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2012 Simon Arlott
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/irqreturn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sched_clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define REG_CONTROL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_COUNTER_LO 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_COUNTER_HI 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG_COMPARE(n) (0x0c + (n) * 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MAX_TIMER 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DEFAULT_TIMER 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct bcm2835_timer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __iomem *control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void __iomem *compare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int match_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct clock_event_device evt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static void __iomem *system_clock __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static u64 notrace bcm2835_sched_read(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return readl_relaxed(system_clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int bcm2835_time_set_next_event(unsigned long event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct clock_event_device *evt_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct bcm2835_timer *timer = container_of(evt_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct bcm2835_timer, evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) writel_relaxed(readl_relaxed(system_clock) + event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) timer->compare);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct bcm2835_timer *timer = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void (*event_handler)(struct clock_event_device *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (readl_relaxed(timer->control) & timer->match_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) writel_relaxed(timer->match_mask, timer->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) event_handler = READ_ONCE(timer->evt.event_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (event_handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) event_handler(&timer->evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static int __init bcm2835_timer_init(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u32 freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct bcm2835_timer *timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) base = of_iomap(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) pr_err("Can't remap registers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ret = of_property_read_u32(node, "clock-frequency", &freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) pr_err("Can't read clock-frequency\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) goto err_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) system_clock = base + REG_COUNTER_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) sched_clock_register(bcm2835_sched_read, 32, freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) freq, 300, 32, clocksource_mmio_readl_up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (irq <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_err("Can't parse IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) goto err_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) timer = kzalloc(sizeof(*timer), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (!timer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) goto err_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) timer->control = base + REG_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) timer->match_mask = BIT(DEFAULT_TIMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) timer->evt.name = node->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) timer->evt.rating = 300;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) timer->evt.set_next_event = bcm2835_time_set_next_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) timer->evt.cpumask = cpumask_of(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ret = request_irq(irq, bcm2835_time_interrupt, IRQF_TIMER | IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) node->name, timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) pr_err("Can't set up timer IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) goto err_timer_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) pr_info("bcm2835: system timer (irq = %d)\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) err_timer_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) kfree(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) err_iounmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) iounmap(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) TIMER_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) bcm2835_timer_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags