^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support functions for calculating clocks/divisors for the ICST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * clock generators. See https://www.idt.com/ for more information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * on these devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef ICST_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define ICST_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct icst_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) unsigned long ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned long vco_max; /* inclusive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) unsigned long vco_min; /* exclusive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned short vd_min; /* inclusive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) unsigned short vd_max; /* inclusive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) unsigned char rd_min; /* inclusive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) unsigned char rd_max; /* inclusive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) const unsigned char *s2div; /* chip specific s2div array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) const unsigned char *idx2s; /* chip specific idx2s array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct icst_vco {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned short v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned char r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned char s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct icst_vco icst_hz_to_vco(const struct icst_params *p, unsigned long freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * ICST307 VCO frequency must be between 6MHz and 200MHz (3.3 or 5V).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * This frequency is pre-output divider.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define ICST307_VCO_MIN 6000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ICST307_VCO_MAX 200000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) extern const unsigned char icst307_s2div[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) extern const unsigned char icst307_idx2s[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * ICST525 VCO frequency must be between 10MHz and 200MHz (3V) or 320MHz (5V).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This frequency is pre-output divider.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ICST525_VCO_MIN 10000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ICST525_VCO_MAX_3V 200000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ICST525_VCO_MAX_5V 320000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern const unsigned char icst525_s2div[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern const unsigned char icst525_idx2s[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #endif