^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2012 ARM Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/vexpress.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct vexpress_osc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct regmap *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct clk_hw hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) unsigned long rate_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned long rate_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define to_vexpress_osc(osc) container_of(osc, struct vexpress_osc, hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static unsigned long vexpress_osc_recalc_rate(struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct vexpress_osc *osc = to_vexpress_osc(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u32 rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) regmap_read(osc->reg, 0, &rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static long vexpress_osc_round_rate(struct clk_hw *hw, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned long *parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct vexpress_osc *osc = to_vexpress_osc(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (osc->rate_min && rate < osc->rate_min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) rate = osc->rate_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (osc->rate_max && rate > osc->rate_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) rate = osc->rate_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct vexpress_osc *osc = to_vexpress_osc(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return regmap_write(osc->reg, 0, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static const struct clk_ops vexpress_osc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .recalc_rate = vexpress_osc_recalc_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .round_rate = vexpress_osc_round_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .set_rate = vexpress_osc_set_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int vexpress_osc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct clk_init_data init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct vexpress_osc *osc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u32 range[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (!osc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) osc->reg = devm_regmap_init_vexpress_config(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (IS_ERR(osc->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return PTR_ERR(osc->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (of_property_read_u32_array(pdev->dev.of_node, "freq-range", range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ARRAY_SIZE(range)) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) osc->rate_min = range[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) osc->rate_max = range[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (of_property_read_string(pdev->dev.of_node, "clock-output-names",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) &init.name) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) init.name = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) init.ops = &vexpress_osc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) init.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) init.num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) osc->hw.init = &init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret = devm_clk_hw_register(&pdev->dev, &osc->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get, &osc->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) clk_hw_set_rate_range(&osc->hw, osc->rate_min, osc->rate_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dev_dbg(&pdev->dev, "Registered clock '%s'\n", init.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct of_device_id vexpress_osc_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { .compatible = "arm,vexpress-osc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MODULE_DEVICE_TABLE(of, vexpress_osc_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct platform_driver vexpress_osc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .name = "vexpress-osc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .of_match_table = vexpress_osc_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .probe = vexpress_osc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) module_platform_driver(vexpress_osc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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