^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Clock driver for the ARM Integrator/AP, Integrator/CP, Versatile AB and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Versatile PB boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012 Linus Walleij
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "icst.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "clk-icst.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define INTEGRATOR_HDR_LOCK_OFFSET 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define VERSATILE_SYS_OSCCLCD_OFFSET 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define VERSATILE_SYS_LOCK_OFFSET 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* Base offset for the core module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static void __iomem *cm_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static const struct icst_params cp_auxosc_params = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .vco_max = ICST525_VCO_MAX_5V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .vco_min = ICST525_VCO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .vd_min = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .vd_max = 263,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .rd_min = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .rd_max = 65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .s2div = icst525_s2div,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .idx2s = icst525_idx2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static const struct clk_icst_desc cm_auxosc_desc __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .params = &cp_auxosc_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .vco_offset = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const struct icst_params versatile_auxosc_params = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .vco_max = ICST307_VCO_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .vco_min = ICST307_VCO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .vd_min = 4 + 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .vd_max = 511 + 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .rd_min = 1 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .rd_max = 127 + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .s2div = icst307_s2div,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .idx2s = icst307_idx2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static const struct clk_icst_desc versatile_auxosc_desc __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .params = &versatile_auxosc_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .vco_offset = VERSATILE_SYS_OSCCLCD_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .lock_offset = VERSATILE_SYS_LOCK_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static void __init cm_osc_setup(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) const struct clk_icst_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const char *clk_name = np->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) const char *parent_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (!cm_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Remap the core module base if not done yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct device_node *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) parent = of_get_parent(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (!parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) pr_err("no parent on core module clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) cm_base = of_iomap(parent, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (!cm_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pr_err("could not remap core module base\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) parent_name = of_clk_get_parent_name(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) of_clk_add_provider(np, of_clk_src_simple_get, clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static void __init of_integrator_cm_osc_setup(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) cm_osc_setup(np, &cm_auxosc_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) CLK_OF_DECLARE(integrator_cm_auxosc_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) "arm,integrator-cm-auxosc", of_integrator_cm_osc_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void __init of_versatile_cm_osc_setup(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) cm_osc_setup(np, &versatile_auxosc_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) CLK_OF_DECLARE(versatile_cm_auxosc_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) "arm,versatile-cm-auxosc", of_versatile_cm_osc_setup);