Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) struct regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * enum icst_control_type - the type of ICST control register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) enum icst_control_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	ICST_VERSATILE, /* The standard type, all control bits available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	ICST_INTEGRATOR_AP_CM, /* Only 8 bits of VDW available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	ICST_INTEGRATOR_AP_SYS, /* Only 8 bits of VDW available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	ICST_INTEGRATOR_AP_PCI, /* Odd bit pattern storage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	ICST_INTEGRATOR_CP_CM_CORE, /* Only 8 bits of VDW and 3 bits of OD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	ICST_INTEGRATOR_CP_CM_MEM, /* Only 8 bits of VDW and 3 bits of OD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	ICST_INTEGRATOR_IM_PD1, /* Like the Versatile, all control bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * struct clk_icst_desc - descriptor for the ICST VCO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * @params: ICST parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * @vco_offset: offset to the ICST VCO from the provided memory base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * @lock_offset: offset to the ICST VCO locking register from the provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  *	memory base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct clk_icst_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	const struct icst_params *params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	u32 vco_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	u32 lock_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct clk *icst_clk_register(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			      const struct clk_icst_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			      const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 			      const char *parent_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			      void __iomem *base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct clk *icst_clk_setup(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 			   const struct clk_icst_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 			   const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			   const char *parent_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			   struct regmap *map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			   enum icst_control_type ctype);