^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * OMAP interface clock support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2013 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Tero Kristo <t-kristo@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/clk/ti.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "clock.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #undef pr_fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define pr_fmt(fmt) "%s: " fmt, __func__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static const struct clk_ops ti_interface_clk_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .init = &omap2_init_clk_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .enable = &omap2_dflt_clk_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .disable = &omap2_dflt_clk_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .is_enabled = &omap2_dflt_clk_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static struct clk *_register_interface(struct device *dev, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) const char *parent_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct clk_omap_reg *reg, u8 bit_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) const struct clk_hw_omap_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct clk_init_data init = { NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct clk_hw_omap *clk_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (!clk_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) clk_hw->hw.init = &init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) clk_hw->ops = ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) memcpy(&clk_hw->enable_reg, reg, sizeof(*reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) clk_hw->enable_bit = bit_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) init.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) init.ops = &ti_interface_clk_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) init.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) init.num_parents = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) init.parent_names = &parent_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) kfree(clk_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static void __init _of_ti_interface_clk_setup(struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) const struct clk_hw_omap_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) const char *parent_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct clk_omap_reg reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u8 enable_bit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ti_clk_get_reg_addr(node, 0, ®))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (!of_property_read_u32(node, "ti,bit-shift", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) enable_bit = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) parent_name = of_clk_get_parent_name(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (!parent_name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pr_err("%pOFn must have a parent\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) clk = _register_interface(NULL, node->name, parent_name, ®,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) enable_bit, ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (!IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) of_clk_add_provider(node, of_clk_src_simple_get, clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static void __init of_ti_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) _of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) of_ti_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) _of_ti_interface_clk_setup(node, &clkhwops_iclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) of_ti_no_wait_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #ifdef CONFIG_ARCH_OMAP3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) _of_ti_interface_clk_setup(node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) &clkhwops_omap3430es2_iclk_hsotgusb_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) of_ti_hsotgusb_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) _of_ti_interface_clk_setup(node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) of_ti_dss_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) _of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) of_ti_ssi_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) _of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) of_ti_am35xx_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #ifdef CONFIG_SOC_OMAP2430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) _of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) of_ti_omap2430_interface_clk_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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