^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Tegra124 DFLL FCPU clock source driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Aleksandr Frid <afrid@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Paul Walmsley <pwalmsley@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <soc/tegra/fuse.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "clk.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "clk-dfll.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "cvb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct dfll_fcpu_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) const unsigned long *cpu_max_freq_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int cpu_max_freq_table_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) const struct cvb_table *cpu_cvb_tables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int cpu_cvb_tables_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Maximum CPU frequency, indexed by CPU speedo id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static const unsigned long tegra124_cpu_max_freq_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) [0] = 2014500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) [1] = 2320500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) [2] = 2116500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) [3] = 2524500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static const struct cvb_table tegra124_cpu_cvb_tables[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .speedo_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .process_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .min_millivolts = 900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .max_millivolts = 1260,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .speedo_scale = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .voltage_scale = 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .entries = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { 204000000UL, { 1112619, -29295, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { 306000000UL, { 1150460, -30585, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { 408000000UL, { 1190122, -31865, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { 510000000UL, { 1231606, -33155, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { 612000000UL, { 1274912, -34435, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { 714000000UL, { 1320040, -35725, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { 816000000UL, { 1366990, -37005, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { 918000000UL, { 1415762, -38295, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { 1020000000UL, { 1466355, -39575, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { 1122000000UL, { 1518771, -40865, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { 1224000000UL, { 1573009, -42145, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { 1326000000UL, { 1629068, -43435, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { 1428000000UL, { 1686950, -44715, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { 1530000000UL, { 1746653, -46005, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { 1632000000UL, { 1808179, -47285, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { 1734000000UL, { 1871526, -48575, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { 1836000000UL, { 1936696, -49855, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { 1938000000UL, { 2003687, -51145, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { 2014500000UL, { 2054787, -52095, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { 2116500000UL, { 2124957, -53385, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { 2218500000UL, { 2196950, -54665, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { 2320500000UL, { 2270765, -55955, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { 2422500000UL, { 2346401, -57235, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { 2524500000UL, { 2437299, -58535, 402 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { 0UL, { 0, 0, 0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .tune0_low = 0x005020ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .tune0_high = 0x005040ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .tune1 = 0x00000060,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static const unsigned long tegra210_cpu_max_freq_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) [0] = 1912500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) [1] = 1912500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) [2] = 2218500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) [3] = 1785000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) [4] = 1632000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) [5] = 1912500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) [6] = 2014500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) [7] = 1734000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) [8] = 1683000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) [9] = 1555500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) [10] = 1504500000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define CPU_CVB_TABLE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .speedo_scale = 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .voltage_scale = 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .entries = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) { 204000000UL, { 1007452, -23865, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) { 306000000UL, { 1052709, -24875, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { 408000000UL, { 1099069, -25895, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { 510000000UL, { 1146534, -26905, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { 612000000UL, { 1195102, -27915, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { 714000000UL, { 1244773, -28925, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { 816000000UL, { 1295549, -29935, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { 918000000UL, { 1347428, -30955, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { 1020000000UL, { 1400411, -31965, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { 1122000000UL, { 1454497, -32975, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { 1224000000UL, { 1509687, -33985, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { 1326000000UL, { 1565981, -35005, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { 1428000000UL, { 1623379, -36015, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { 1530000000UL, { 1681880, -37025, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { 1632000000UL, { 1741485, -38035, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { 1734000000UL, { 1802194, -39055, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { 1836000000UL, { 1864006, -40065, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { 1912500000UL, { 1910780, -40815, 370 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { 2014500000UL, { 1227000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { 2218500000UL, { 1227000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { 0UL, { 0, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define CPU_CVB_TABLE_XA \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .speedo_scale = 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .voltage_scale = 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .entries = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { 204000000UL, { 1250024, -39785, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { 306000000UL, { 1297556, -41145, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { 408000000UL, { 1346718, -42505, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { 510000000UL, { 1397511, -43855, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { 612000000UL, { 1449933, -45215, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { 714000000UL, { 1503986, -46575, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { 816000000UL, { 1559669, -47935, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { 918000000UL, { 1616982, -49295, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { 1020000000UL, { 1675926, -50645, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { 1122000000UL, { 1736500, -52005, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { 1224000000UL, { 1798704, -53365, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { 1326000000UL, { 1862538, -54725, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { 1428000000UL, { 1928003, -56085, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { 1530000000UL, { 1995097, -57435, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { 1606500000UL, { 2046149, -58445, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { 1632000000UL, { 2063822, -58795, 565 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { 0UL, { 0, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define CPU_CVB_TABLE_EUCM1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .speedo_scale = 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .voltage_scale = 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .entries = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) { 204000000UL, { 734429, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { 306000000UL, { 768191, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { 408000000UL, { 801953, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { 510000000UL, { 835715, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { 612000000UL, { 869477, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { 714000000UL, { 903239, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { 816000000UL, { 937001, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { 918000000UL, { 970763, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { 1020000000UL, { 1004525, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { 1122000000UL, { 1038287, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { 1224000000UL, { 1072049, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { 1326000000UL, { 1105811, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { 1428000000UL, { 1130000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { 1555500000UL, { 1130000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { 1632000000UL, { 1170000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { 1734000000UL, { 1227500, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) { 0UL, { 0, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define CPU_CVB_TABLE_EUCM2 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .speedo_scale = 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .voltage_scale = 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .entries = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { 204000000UL, { 742283, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { 306000000UL, { 776249, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { 408000000UL, { 810215, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { 510000000UL, { 844181, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { 612000000UL, { 878147, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { 714000000UL, { 912113, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { 816000000UL, { 946079, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { 918000000UL, { 980045, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { 1020000000UL, { 1014011, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { 1122000000UL, { 1047977, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { 1224000000UL, { 1081943, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) { 1326000000UL, { 1090000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { 1479000000UL, { 1090000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { 1555500000UL, { 1162000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { 1683000000UL, { 1195000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { 0UL, { 0, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define CPU_CVB_TABLE_EUCM2_JOINT_RAIL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .speedo_scale = 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .voltage_scale = 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .entries = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) { 204000000UL, { 742283, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) { 306000000UL, { 776249, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) { 408000000UL, { 810215, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) { 510000000UL, { 844181, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) { 612000000UL, { 878147, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) { 714000000UL, { 912113, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { 816000000UL, { 946079, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) { 918000000UL, { 980045, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) { 1020000000UL, { 1014011, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) { 1122000000UL, { 1047977, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) { 1224000000UL, { 1081943, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { 1326000000UL, { 1090000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) { 1479000000UL, { 1090000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { 1504500000UL, { 1120000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { 0UL, { 0, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define CPU_CVB_TABLE_ODN \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .speedo_scale = 100, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .voltage_scale = 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .entries = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) { 204000000UL, { 721094, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) { 306000000UL, { 754040, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) { 408000000UL, { 786986, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) { 510000000UL, { 819932, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) { 612000000UL, { 852878, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) { 714000000UL, { 885824, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) { 816000000UL, { 918770, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) { 918000000UL, { 915716, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) { 1020000000UL, { 984662, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) { 1122000000UL, { 1017608, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) { 1224000000UL, { 1050554, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) { 1326000000UL, { 1083500, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) { 1428000000UL, { 1116446, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) { 1581000000UL, { 1130000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) { 1683000000UL, { 1168000, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) { 1785000000UL, { 1227500, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) { 0UL, { 0, 0, 0 } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static struct cvb_table tegra210_cpu_cvb_tables[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .speedo_id = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .min_millivolts = 840,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .max_millivolts = 1120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) CPU_CVB_TABLE_EUCM2_JOINT_RAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .speedo_id = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .min_millivolts = 840,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .max_millivolts = 1120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) CPU_CVB_TABLE_EUCM2_JOINT_RAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .speedo_id = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .min_millivolts = 900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .max_millivolts = 1162,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) CPU_CVB_TABLE_EUCM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .speedo_id = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .min_millivolts = 900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .max_millivolts = 1162,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) CPU_CVB_TABLE_EUCM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .speedo_id = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .min_millivolts = 900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .max_millivolts = 1195,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) CPU_CVB_TABLE_EUCM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .speedo_id = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .min_millivolts = 900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .max_millivolts = 1195,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) CPU_CVB_TABLE_EUCM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .speedo_id = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .min_millivolts = 841,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) CPU_CVB_TABLE_EUCM1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .speedo_id = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .min_millivolts = 841,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) CPU_CVB_TABLE_EUCM1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .speedo_id = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .min_millivolts = 870,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .max_millivolts = 1150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .speedo_id = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .min_millivolts = 870,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .max_millivolts = 1150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .tune1 = 0x25501d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .speedo_id = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .min_millivolts = 818,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .speedo_id = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .min_millivolts = 818,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .tune1 = 0x25501d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .speedo_id = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .process_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .min_millivolts = 918,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .max_millivolts = 1113,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) CPU_CVB_TABLE_XA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .tune1 = 0x17711BD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .speedo_id = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .min_millivolts = 825,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) CPU_CVB_TABLE_ODN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .speedo_id = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .min_millivolts = 825,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) CPU_CVB_TABLE_ODN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .tune1 = 0x25501d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .speedo_id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .min_millivolts = 870,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .speedo_id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .min_millivolts = 870,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .tune1 = 0x25501d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .speedo_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .min_millivolts = 837,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .speedo_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .min_millivolts = 837,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .max_millivolts = 1227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) .tune1 = 0x25501d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .speedo_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .process_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .min_millivolts = 850,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .max_millivolts = 1170,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .tune1 = 0x20091d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .speedo_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .process_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .min_millivolts = 850,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .max_millivolts = 1170,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) CPU_CVB_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .cpu_dfll_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .tune0_low = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .tune0_high = 0xffead0ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .tune1 = 0x25501d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .tune_high_min_millivolts = 864,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static const struct dfll_fcpu_data tegra124_dfll_fcpu_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .cpu_max_freq_table = tegra124_cpu_max_freq_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .cpu_max_freq_table_size = ARRAY_SIZE(tegra124_cpu_max_freq_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .cpu_cvb_tables = tegra124_cpu_cvb_tables,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .cpu_cvb_tables_size = ARRAY_SIZE(tegra124_cpu_cvb_tables)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) static const struct dfll_fcpu_data tegra210_dfll_fcpu_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .cpu_max_freq_table = tegra210_cpu_max_freq_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .cpu_max_freq_table_size = ARRAY_SIZE(tegra210_cpu_max_freq_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .cpu_cvb_tables = tegra210_cpu_cvb_tables,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .cpu_cvb_tables_size = ARRAY_SIZE(tegra210_cpu_cvb_tables),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static const struct of_device_id tegra124_dfll_fcpu_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .compatible = "nvidia,tegra124-dfll",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .data = &tegra124_dfll_fcpu_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .compatible = "nvidia,tegra210-dfll",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .data = &tegra210_dfll_fcpu_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static void get_alignment_from_dt(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct rail_alignment *align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (of_property_read_u32(dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) "nvidia,pwm-voltage-step-microvolts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) &align->step_uv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) align->step_uv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (of_property_read_u32(dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) "nvidia,pwm-min-microvolts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) &align->offset_uv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) align->offset_uv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static int get_alignment_from_regulator(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct rail_alignment *align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct regulator *reg = devm_regulator_get(dev, "vdd-cpu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return PTR_ERR(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) align->offset_uv = regulator_list_voltage(reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) align->step_uv = regulator_get_linear_step(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) devm_regulator_put(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static int tegra124_dfll_fcpu_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) int process_id, speedo_id, speedo_value, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) struct tegra_dfll_soc_data *soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) const struct dfll_fcpu_data *fcpu_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct rail_alignment align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) fcpu_data = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (!fcpu_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) process_id = tegra_sku_info.cpu_process_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) speedo_id = tegra_sku_info.cpu_speedo_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) speedo_value = tegra_sku_info.cpu_speedo_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (speedo_id >= fcpu_data->cpu_max_freq_table_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) dev_err(&pdev->dev, "unknown max CPU freq for speedo_id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) speedo_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) soc = devm_kzalloc(&pdev->dev, sizeof(*soc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (!soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) soc->dev = get_cpu_device(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (!soc->dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) dev_err(&pdev->dev, "no CPU0 device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (of_property_read_bool(pdev->dev.of_node, "nvidia,pwm-to-pmic")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) get_alignment_from_dt(&pdev->dev, &align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) err = get_alignment_from_regulator(&pdev->dev, &align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) soc->max_freq = fcpu_data->cpu_max_freq_table[speedo_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) soc->cvb = tegra_cvb_add_opp_table(soc->dev, fcpu_data->cpu_cvb_tables,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) fcpu_data->cpu_cvb_tables_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) &align, process_id, speedo_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) speedo_value, soc->max_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) soc->alignment = align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (IS_ERR(soc->cvb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) dev_err(&pdev->dev, "couldn't add OPP table: %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) PTR_ERR(soc->cvb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return PTR_ERR(soc->cvb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) err = tegra_dfll_register(pdev, soc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) tegra_cvb_remove_opp_table(soc->dev, soc->cvb, soc->max_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static int tegra124_dfll_fcpu_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) struct tegra_dfll_soc_data *soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) soc = tegra_dfll_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (IS_ERR(soc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_err(&pdev->dev, "failed to unregister DFLL: %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) PTR_ERR(soc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) return PTR_ERR(soc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) tegra_cvb_remove_opp_table(soc->dev, soc->cvb, soc->max_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static const struct dev_pm_ops tegra124_dfll_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) SET_RUNTIME_PM_OPS(tegra_dfll_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) tegra_dfll_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) SET_SYSTEM_SLEEP_PM_OPS(tegra_dfll_suspend, tegra_dfll_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static struct platform_driver tegra124_dfll_fcpu_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .probe = tegra124_dfll_fcpu_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .remove = tegra124_dfll_fcpu_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .name = "tegra124-dfll",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .of_match_table = tegra124_dfll_fcpu_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .pm = &tegra124_dfll_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) builtin_platform_driver(tegra124_dfll_fcpu_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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